Investigation of diffusion rounding for post-lithography analysis

  • Authors:
  • Puneet Gupta;Andrew B. Kahng;Youngmin Kim;Saumil Shah;Dennis Sylvester

  • Affiliations:
  • University of California, Los Angeles, CA;University of California at San Diego, La Jolla, CA;University of Michigan, Ann Arbor, MI;Blaze DFM, Inc., Sunnyvale, CA;University of Michigan, Ann Arbor, MI

  • Venue:
  • Proceedings of the 2008 Asia and South Pacific Design Automation Conference
  • Year:
  • 2008

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Abstract

Due to aggressive scaling of device feature size to improve circuit performance in the sub-wavelength lithography regime, both diffusion and poly gate shapes are no longer rectilinear. Diffusion rounding occurs most notably where the diffusion shapes are not perfectly rectangular, including common L and T-shaped diffusion layouts to connect to power rails. This paper investigates the impact of the non-rectilinear shape of diffusion (i.e., sloped diffusion or diffusion rounding) on circuit performance (delay and leakage). Simple weighting function models for Ion and Ioff to account for the diffusion rounding effects are proposed, and compared with TCAD simulation. Our experiments show that diffusion rounding has an asymmetric characteristic for Ioff due to the differing significance of source/drain junctions on device threshold voltage. Therefore, we can model Ion and Ioff as a function of slope angle and direction. The proposed models match well with TCAD simulation results, with less than 2% and 6% error in Ion and Ioff, respectively.