ICS '88 Proceedings of the 2nd international conference on Supercomputing
The Journal of Supercomputing
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
A comparative analysis of four parallelisation schemes
ICS '99 Proceedings of the 13th international conference on Supercomputing
Improving memory hierarchy performance for irregular applications
ICS '99 Proceedings of the 13th international conference on Supercomputing
Proceedings of the 14th international conference on Supercomputing
Efficient compiler and run-time support for parallel irregular reductions
Parallel Computing - special issue on parallel computing for irregular applications
Parallel Programming with Polaris
Computer
Compiler and Runtime Support for Irregular Reductions on a Multithreaded Architecture
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
A Comparison of Parallelization Techniques for Irregular Reductions
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Compile-time composition of run-time data and iteration reorderings
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Memory Hierarchy Management for Iterative Graph Structures
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
IEEE Transactions on Knowledge and Data Engineering
Data partitioning-based parallel irregular reductions: Research Articles
Concurrency and Computation: Practice & Experience - Compilers for Parallel Computers
High-Performance Throughput Computing
IEEE Micro
Exploiting Locality for Irregular Scientific Codes
IEEE Transactions on Parallel and Distributed Systems
An Adaptive Algorithm Selection Framework for Reduction Parallelization
IEEE Transactions on Parallel and Distributed Systems
Region-based parallelization of irregular reductions on explicitly managed memory hierarchies
The Journal of Supercomputing
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This paper deals with the analysis of the parallelization of irregular reductions, a frequent operation found in many irregular applications, in the context of a shared-memory model. Locality exploitation is a classical problem in computer architecture and compiler design that presently still plays a fundamental role due to the growing gap between memory and processor speeds. This work contributes a formal description of the design space of locality-based parallel irregular reductions, which is used to achieve a quantitative analysis of them. The model allows to determine behavioural aspects in the methods that may influence their performance. Several parallel compiler techniques for irregular reductions are placed and examined within this model. Experimental evaluation is also presented, under various locality conditions, and the results were compared to those derived from the model.