Proceedings of the 12th ACM conference on Computer and communications security
Modified Triple Modular Redundancy Structure based on Asynchronous Circuit Technique
DFT '06 Proceedings of the 21st IEEE International Symposium on on Defect and Fault-Tolerance in VLSI Systems
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Control flow checking is a commonly used method to promote the fault tolerance of embedded systems. Conventional control flow checking by software signatures (CFCSS) imposes large overheads on code size and performance. A control flow checking scheme based on 8051 architecture, the control flow checking and recovering by compiler signatures and hardware checking (CFCCH) is proposed in this paper. Compared to CFCSS, the CFCCH is preferred to be implemented on the 8051 architectures to efficiently reduce code size and program execution time while keep the same fault tolerant ability.