A fast congestion estimator for routing with bounded detours

  • Authors:
  • Lerong Cheng;Xiaoyu Song;Guowu Yang;William N. N. Hung;Zhiwei Tang;Shaodi Gao

  • Affiliations:
  • Department of EE, University of California, Los Angeles, USA;Department of Electrical and Computer Engineering, Portland State University, OR, USA;Department of Electrical and Computer Engineering, Portland State University, OR, USA;Department of Electrical and Computer Engineering, Portland State University, OR, USA;Department of Electrical and Computer Engineering, Portland State University, OR, USA;IBM, EDA Lab, Hopewell Junction, NY 12533, USA

  • Venue:
  • Integration, the VLSI Journal
  • Year:
  • 2008

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Abstract

Congestion estimation is an important issue for design automation of the VLSI layout. Fast congestion estimation provides an efficient means to adjust the placement and wire planning. A probabilistic model of interconnections enables designers to quickly predict routing congestion. We propose a powerful and fast estimation approach that allows wires to have bounded-length detours to bypass congestions. The method is more realistic and precise than the previous work. The experimental results demonstrate the effectiveness of the method on routing benchmarks.