FPGA-based implementation of safe Petri nets models

Authors:
V. Ababii;E. Gutuleac;V. Sudacevschi;D. Odobesco
Affiliations:
Computer Sciences Department, Technical University of Moldova, Chisinau, Republic of Moldova;Computer Sciences Department, Technical University of Moldova, Chisinau, Republic of Moldova;Computer Sciences Department, Technical University of Moldova, Chisinau, Republic of Moldova;Computer Sciences Department, Technical University of Moldova, Chisinau, Republic of Moldova
Venue:
AMCOS'05 Proceedings of the 4th WSEAS International Conference on Applied Mathematics and Computer Science
Year:
2005

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Abstract

In this work is proposed a hardware implementation method of Safe Petri Nets (SaPN) models. The processing structure presents an interaction between homogeny processing elements functional defined. On dependence of interconnections of elements, there can be implemented any complexity of Safe Petri Net model. The processing elements represent a flexible architecture, which permit to adjust them to Safe Petri Nets models. Using this architecture and interactions of elements we obtained a reduced time of processing to checking Safe Petri Nets to reachability, viability and other behavior properties.