Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Design and validation of computer protocols
Design and validation of computer protocols
Model checking and abstraction
ACM Transactions on Programming Languages and Systems (TOPLAS)
Property preserving abstractions for the verification of concurrent systems
Formal Methods in System Design - Special issue on computer-aided verification (based on CAV'92 workshop)
Abstract interpretation of reactive systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
A practical method for verifying event-driven software
Proceedings of the 21st international conference on Software engineering
POPL '77 Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Development of Veda, a Prototyping Tool for Distributed Algorithms
IEEE Transactions on Software Engineering
Abstraction in Software Model Checking: Principles and Practice (Tutorial Overview and Bibliography)
Proceedings of the 9th International SPIN Workshop on Model Checking of Software
OPEN/CÆSAR: An OPen Software Architecture for Verification, Simulation, and Testing
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Finding Feasible Counter-examples when Model Checking Abstracted Java Programs
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
State Exploration by Transformation with LOLA
Proceedings of the International Workshop on Automatic Verification Methods for Finite State Systems
Refinement of LTL Formulas for Abstract Model Checking
SAS '02 Proceedings of the 9th International Symposium on Static Analysis
IF: A Validation Environment for Timed Asynchronous Systems
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Counterexample-Guided Abstraction Refinement
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Verification of a Distributed Cache Memory by Using Abstractions
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
CADP - A Protocol Validation and Verification Toolbox
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Model Checking Guided Abstraction and Analysis
SAS '00 Proceedings of the 7th International Symposium on Static Analysis
vUML: A Tool for Verifying UML Models
ASE '99 Proceedings of the 14th IEEE international conference on Automated software engineering
ASE '00 Proceedings of the 15th IEEE international conference on Automated software engineering
Implementing Statecharts in PROMELA/SPIN
WIFT '98 Proceedings of the Second IEEE Workshop on Industrial Strength Formal Specification Techniques
Foundations of the Bandera abstraction tools
The essence of computation
αSPIN: A tool for abstract model checking
International Journal on Software Tools for Technology Transfer (STTT)
Remote Integration and Coordination of Verification Tools in JETI
ECBS '05 Proceedings of the 12th IEEE International Conference and Workshops on Engineering of Computer-Based Systems
Model checking software with well-defined APIs: the socket case
Proceedings of the 10th international workshop on Formal methods for industrial critical systems
PiXL: Applying xml standards to support the integration of analysis tools for protocols
Science of Computer Programming
Spin model checker, the: primer and reference manual
Spin model checker, the: primer and reference manual
Integration of Reliability and Performance Analyses for Active Network Services
Electronic Notes in Theoretical Computer Science (ENTCS)
Hi-index | 0.00 |
The dream of software developers is a debugging tool that automatically finds all the potential errors in a quite readable and easy-to-locate format. In particular, this is sought desired by developers of concurrent programs for critical systems, such as control or communication systems. The unpredictable nature of this software and its large amount of potential behaviors makes it very prone to errors. Fortunately, the development of verification techniques during the last 20 years currently has motivated promising projects to obtain powerful tools. This paper summarizes the view of the past evolution and the current trend in this field.