Statecharts: A visual formalism for complex systems
Science of Computer Programming
Design and validation of computer protocols
Design and validation of computer protocols
Introduction to design choices in the semantics of Statecharts
Information Processing Letters
The ESTEREL synchronous programming language: design, semantics, implementation
Science of Computer Programming
Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
The STATEMATE semantics of statecharts
ACM Transactions on Software Engineering and Methodology (TOSEM)
Model checking large software specifications
SIGSOFT '96 Proceedings of the 4th ACM SIGSOFT symposium on Foundations of software engineering
IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
Improving efficiency of symbolic model checking for state-based system requirements
Proceedings of the 1998 ACM SIGSOFT international symposium on Software testing and analysis
Symbolic Model Checking
Formal Development of Reactive Systems - Case Study Production Cell
Formal Development of Reactive Systems - Case Study Production Cell
Hierarchical Automata as Model for Statecharts
ASIAN '97 Proceedings of the Third Asian Computing Science Conference on Advances in Computing Science
An improvement in formal verification
Proceedings of the 7th IFIP WG6.1 International Conference on Formal Description Techniques VII
Tamagotchis Need Not Die - Verification of STATEMENT Design
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Verification of Large State/Event Systems Using Compositionality and Dependency Analysis
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
A Compositional Real-Time Semantics of STATEMATE Designs
COMPOS'97 Revised Lectures from the International Symposium on Compositionality: The Significant Difference
VDM '90 Proceedings of the Third International Symposium of VDM Europe on VDM and Z - Formal Methods in Software Development
Reliable Hashing without Collosion Detection
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
On formal semantics of statecharts as supported by STATEMATE
2FACS'97 Proceedings of the 2nd BCS-FACS conference on Northern Formal Methods
Software engineering for safety: a roadmap
Proceedings of the Conference on The Future of Software Engineering
Analyzing software architectures with Argus-I
Proceedings of the 22nd international conference on Software engineering
Automatic Generation of Test Oracles—From Pilot Studies to Application
Automated Software Engineering
Describing the Syntax and Semantics of UML Statecharts in a Heterogeneous Modelling Environment
DIAGRAMS '02 Proceedings of the Second International Conference on Diagrammatic Representation and Inference
Slicing Hierarchical Automata for Model Checking UML Statecharts
ICFEM '02 Proceedings of the 4th International Conference on Formal Engineering Methods: Formal Methods and Software Engineering
iState: A Statechart Translator
«UML» '01 Proceedings of the 4th International Conference on The Unified Modeling Language, Modeling Languages, Concepts, and Tools
A Translation of Statecharts to Esterel
FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume II
IFM '02 Proceedings of the Third International Conference on Integrated Formal Methods
Visualizing graphical and textual formalisms
Information Systems
Formal approaches to systems analysis using UML: an overview
Advanced topics in database research vol. 1
A framework for learning coordinated behavior
GECCO '05 Proceedings of the 7th annual workshop on Genetic and evolutionary computation
Aspect-oriented software design with a variant of UML/STD
Proceedings of the 2006 international workshop on Scenarios and state machines: models, algorithms, and tools
Toward an integratred verification environment for embedded systems
MS'06 Proceedings of the 17th IASTED international conference on Modelling and simulation
Modelling and model checking suspendible business processes via statechart diagrams and CSP
Science of Computer Programming
On The Evolution Of Reliability Methods For Critical Software
Journal of Integrated Design & Process Science - Applications of formal methods
Dreadlocks: efficient deadlock detection
Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures
Towards Verification of Model Transformations Via Goal-Directed Certification
Model-Driven Development of Reliable Automotive Services
A Survey of Formal Verification for Business Process Modeling
ICCS '08 Proceedings of the 8th international conference on Computational Science, Part II
Towards Component-Based Design and Verification of a μ-Controller
CBSE '08 Proceedings of the 11th International Symposium on Component-Based Software Engineering
Original papers: Model-checking for adventure videogames
Information and Software Technology
Electronic Notes in Theoretical Computer Science (ENTCS)
Detecting design flaws in UML state charts for embedded software
HVC'06 Proceedings of the 2nd international Haifa verification conference on Hardware and software, verification and testing
SVtL: system verification through logic tool support for verifying sliced hierarchical statecharts
WADT'06 Proceedings of the 18th international conference on Recent trends in algebraic development techniques
Rewrite rules and operational semantics for model checking UML statecharts
UML'00 Proceedings of the 3rd international conference on The unified modeling language: advancing the standard
Formalising UML state machines for model checking
UML'99 Proceedings of the 2nd international conference on The unified modeling language: beyond the standard
Design verification in model-based μ-controller development using an abstract component
Software and Systems Modeling (SoSyM)
Specialization and validation of statecharts in OWL
EKAW'10 Proceedings of the 17th international conference on Knowledge engineering and management by the masses
A visualization framework for the modeling and formal analysis of high assurance systems
MoDELS'06 Proceedings of the 9th international conference on Model Driven Engineering Languages and Systems
An automatic mapping from statecharts to verilog
ICTAC'04 Proceedings of the First international conference on Theoretical Aspects of Computing
Modular reasoning about region composition
Proceedings of the eleventh workshop on Foundations of Aspect-Oriented Languages
Model checking for timed statecharts
FORTE'05 Proceedings of the 25th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Heuristics to verify LTL properties of hierarchical systems
VECoS'08 Proceedings of the Second international conference on Verification and Evaluation of Computer and Communication Systems
Proceedings of the 7th International Workshop on Middleware Tools, Services and Run-Time Support for Sensor Networks
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
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We translate statecharts into PROMELA, the input language of the SPIN verification system, using extended hierarchical automata as an intermediate format We discuss two possible frameworks for this translation, leading to either sequential or parallel code. We show that in this context the sequential code can be verified more efficiently than the parallel code. We conclude with the discussion of an application of the resulting translator to a well-known case study, which demonstrates the feasibility of linear temporal logic model checking of statecharts.