Evaluation of fully-integrated switching regulators for CMOS process technologies

Authors:
Jaeseo Lee;Geoff Hatcher;Lieven Vandenberghe;Chih-Kong Ken Yang
Affiliations:
Advanced Micro Devices, Santa Clara, CA;-;University of California, Los Angeles, CA;University of California, Los Angeles, CA
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2007

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Abstract

This paper presents a feasibile study of fully-integrated switching voltage regulators for power-optimized systems-on-chip (SoCs). In order to evaluate the power efficiency across a number of design variables, a compact macro-model of a regulator is created and validated. A key focus of the study is on the characteristics of the active and passive devices that are needed in order to maximize the efficiency of an on-chip regulator. With the macro-model, geometric programming is used to find the optimal characteristics for a given set of constraints such as load condition, process technology, and area. The achievable efficiencies for various current loads and across a range of technologies from 0.35-µm to 90-nm CMOS process are analyzed. The power efficiency is found to be strongly dependent on the inductor technology and over 70% efficiency is possible with advanced inductor technologies.