Applied cryptography (2nd ed.): protocols, algorithms, and source code in C
Applied cryptography (2nd ed.): protocols, algorithms, and source code in C
High speed networking security: design and implementation of two new DDP-based ciphers
Mobile Networks and Applications
Energy Scalable Universal Hashing
IEEE Transactions on Computers
Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems
Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems
Low-Power Processors and Systems on Chips
Low-Power Processors and Systems on Chips
Wireless Security and Cryptography: Specifications and Implementations
Wireless Security and Cryptography: Specifications and Implementations
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A new layout design for a data dependent permutation (DDP)-Cobra H64-bit cipher optimized for low-power and high speed operation is presented in this paper. The layout is characterized as a design for mobile and handheld equipment. The design achieves low power consumption by using low power logic gates in layout level. Through the technique of pipelining in the internal rounding blocks of the Cobra cipher and an increase in the frequency of the circuit from 90MHz to 140MHz, the design achieves increased speed and performance, resulting in throughput ranging from 5.5 Gbps to 8.4 Gbps. Simulation results based on the layout level have confirmed the validity of the proposed technique, as well as confirmed that low power, speed and performance can be optimized through design at the layout level.