Configurable 3D-integrated focal-plane cellular sensor–processor array architecture

Authors:
Péter Földesy;Ákos Zarándy;Csaba Rekeczky
Affiliations:
Cellular Sensory and Wave Computing Research Laboratory, Computer and Automation Research Institute of the Hungarian Academy of Sciences, Kende utca 13-17, Budapest, H-1111, Hungary and Eutecus In ...;Cellular Sensory and Wave Computing Research Laboratory, Computer and Automation Research Institute of the Hungarian Academy of Sciences, Kende utca 13-17, Budapest, H-1111, Hungary and Eutecus In ...;Cellular Sensory and Wave Computing Research Laboratory, Computer and Automation Research Institute of the Hungarian Academy of Sciences, Kende utca 13-17, Budapest, H-1111, Hungary and Eutecus In ...
Venue:
International Journal of Circuit Theory and Applications - Cellular Wave Computing Architecture
Year:
2008

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Abstract

Mixed-signal cellular visual microprocessor architecture with digital processors is described. An Application Specific Integrated Circuit (ASIC) implementation is also demonstrated. The architecture is composed of a regular sensor readout circuit array, prepared for 3D face-to-face-type integration, and one or several cascaded array of mainly identical (single instruction multiple data, SIMD) processing elements. The individual array elements were derived from the same general Hardware Description Language (HDL) description and could be of different sizes, aspect ratio, and computing resources. Copyright © 2008 John Wiley & Sons, Ltd.