An approach to interface synthesis
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Proceedings of the 6th international workshop on Hardware/software codesign
Proceedings of the 39th annual Design Automation Conference
Colif: A Design Representation for Application-Specific Multiprocessor SOCs
IEEE Design & Test
A hierarchical modeling framework for on-chip communication architectures
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
An XML-Based Meta-Model for Design of Multiprocessor Embedded Systems
VIUF '00 Proceedings of the VHDL International Users Forum Fall Workshop (VIUF'00)
Interoperability Beyond Design: Sharing Knowledge between Design and Manufacturing
ISQED '03 Proceedings of the 4th International Symposium on Quality Electronic Design
ISQED '03 Proceedings of the 4th International Symposium on Quality Electronic Design
Debugging HW/SW interface for MPSoC: video encoder system design case study
Proceedings of the 41st annual Design Automation Conference
An introduction to OpenAccess: an open source data model and API for IC design
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
VCore-based design methodology
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
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The rapidly increasing complexity of integrated circuit design is evolving to a more data-centric design scenario that supports sharing of design information. This paper presents the universal data model platform (UDMP) which introduce the data-centric design revolution into the electronic system-level (ESL) design to support better cooperation of design individuals. UDMP provides (1) a set of universal data models to help both university researches and industry, and (2) an application programming interface (API) based mechanism for data exchanging to eliminate the inefficiency of traditional low-bandwidth formatted files. Thereby the cooperative work of ESL design and the efficiency of design iteration can be improved. As primary experiments, we apply the concepts of UDMP to two case studies. The heterogeneous graph modeling demonstrates how UDMP unifies the similar graph models in a flexible way, and the simplification of an interface synthesis flow which consists three individual algorithms obtains a running time reduction by about 10% for selected designs.