The Intelligent vision sensor: Turning video into information
AVSS '07 Proceedings of the 2007 IEEE Conference on Advanced Video and Signal Based Surveillance
Highly parallel implementation of Harris Corner detector on CSX SIMD architecture
Euro-Par 2010 Proceedings of the 2010 conference on Parallel processing
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iVisual, an intelligent visual sensor SoC integrating 2790fps CMOS image sensor and 76.8GOPS, 374mW vision processor, is implemented on a 7.5mmx9.4mm die with 0.18μm CIS process. The light-in, answer-out SoC architecture avoids privacy problems of intelligent visual sensor. The feature processor and inter-processor synchronization scheme together increase 51% of average throughput. The 205GOPS/W power efficiency and 1.16GOPS/mm2 area efficiency are achieved.