A MIPS R2000 implementation

Authors:
Nathaniel Pinckney;Thomas Barr;Michael Dayringer;Matthew McKnett;Nan Jiang;Carl Nygaard;David Money Harris;Joel Stanley;Braden Phillips
Affiliations:
Harvey Mudd College, Claremont, CA;Harvey Mudd College, Claremont, CA;Harvey Mudd College, Claremont, CA;Harvey Mudd College, Claremont, CA;Harvey Mudd College, Claremont, CA;Harvey Mudd College, Claremont, CA;Harvey Mudd College, Claremont, CA;The University of Adelaide, SA, Australia;The University of Adelaide, SA, Australia
Venue:
Proceedings of the 45th annual Design Automation Conference
Year:
2008

Citing 1
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Abstract

Thirty-four undergraduates implemented a MIPS R2000 processor for an introductory CMOS VLSI design course. This included designing a microarchitecture in Verilog, developing custom PLA generation and ad-hoc random testing tools, creating a standard cell library, schematics, layout, and PCB test board. The processor was fabricated by MOSIS on an AMI 0.5-micron process, included 160,000 transistors, and ran at 7.25 MHz.