Multicore design is the challenge! what is the solution?

Authors:
Eshel Haritan;Toshihiro Hattori;Hiroyuki Yagi;Pierre Paulin;Wayne Wolf;Achim Nohl;Drew Wingard;Mike Muller
Affiliations:
CoWare, Inc., San Jose, CA;Renesas Technology Corp., Kodaira, Tokyo, Japan;STARC Yokohama, Kanagawa, Japan;STMicroelectronics, Ottawa, Ontario, Canada;Georgia Institute of Technology, Atlanta, GA;CoWare, Inc., Aachen, North Rhine-Westphalia, Germany;Sonics Inc., Mountain View, CA;ARM Limited
Venue:
Proceedings of the 45th annual Design Automation Conference
Year:
2008

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Abstract

Multi Processor SoC (MPSoC) are being designed today. MPSoC design can help achieve aggressive performance and low power targets but it creates new design challenges: How to design the interconnect fabric and memory sub-system to allow the massive data movement required in a multi processor SoC environment? How to develop, debug and verify HW and SW functionality in a MPSoC design? Is MPSoC design an inflection point that will require new design methods including ESL methodologies?