Strategies for mainstream usage of formal verification

  • Authors:
  • Raj S. Mitra

  • Affiliations:
  • Texas Instruments, Bangalore

  • Venue:
  • Proceedings of the 45th annual Design Automation Conference
  • Year:
  • 2008

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Abstract

Formal verification technology has advanced significantly in recent years, yet it seems to have no noticeable acceptance as a mainstream verification methodology within the industry. This paper discusses the issues involved with deploying formal verification on a production mode, and the strategies that may need to be adopted to make this deployment successful. It analyses the real benefits and risks of using formal verification in the overall verification process, and how to integrate this new technology with traditional technologies like simulation. The lessons described in this paper have been learnt from several years of experience with using commercial formal verification tools in industrial projects.