Economic analysis of testing homogeneous Manycore chips
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Studies by previous researchers using production test data reported that not all the production test patterns applied detected defective chips. Researchers found that 70% to 90% of their production test patterns seemed useless because these patterns detected no defective chips and they could therefore be removed without impacting test quality. Previous researchers qualitatively explained this finding by a lack of correlation between test metrics and defect coverage. Notwithstanding the lack of correlation between test metrics and defect coverage, in this paper we develop a simple statistical model that relates the expected number of useless patterns to the production yield, the defect coverage characteristics, and the number of tested chips. This model demonstrates that for practical values of production yield, defect coverage and number of chips tested, a significant fraction of test patterns will be useless. We validated this statistical model by comparing its results with actual production testing data.