Depth reduction for noncommutative arithmetic circuits
STOC '93 Proceedings of the twenty-fifth annual ACM symposium on Theory of computing
Upper and Lower Bounds for Some Depth-3 Circuit Classes
CCC '97 Proceedings of the 12th Annual IEEE Conference on Computational Complexity
On the correlation between parity and modular polynomials
MFCS'06 Proceedings of the 31st international conference on Mathematical Foundations of Computer Science
The multiparty communication complexity of set disjointness
STOC '12 Proceedings of the forty-fourth annual ACM symposium on Theory of computing
Degree lower bounds of tower-type for approximating formulas with parity quantifiers
ICALP'12 Proceedings of the 39th international colloquium conference on Automata, Languages, and Programming - Volume Part II
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Degree lower bounds of tower-type for approximating formulas with parity quantifiers
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Theory of Computing Systems
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The author presents a very simple proof of the fact that any language accepted by polynomial-size depth-k unbounded-fan-in circuits of AND and OR gates is accepted by depth-three threshold circuits of size n raised to the power O(log/sup k/n). The proof uses much of the intuition of S. Toda's result that the polynomial hierarchy is contained in P/sup Hash P/ (30th Ann. Symp. Foundations Comput. Sci., p.514-519, 1989).