A multimodel methodology for qualitative model engineering
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Theoretical Computer Science
Symbolic model checking for real-time systems
Information and Computation
Proceedings of the DIMACS/SYCON workshop on Hybrid systems III : verification and control: verification and control
Multimodeling as a unified modeling framework
WSC '93 Proceedings of the 25th conference on Winter simulation
Event-clock automata: a determinizable class of timed automata
Theoretical Computer Science
The time and state relationships in simulation modeling
Communications of the ACM - Special issue on simulation modeling and statistical computing
Theory of Modelling and Simulation
Theory of Modelling and Simulation
Theory of Modeling and Simulation
Theory of Modeling and Simulation
Time-Constrained Automata (Extended Abstract)
CONCUR '91 Proceedings of the 2nd International Conference on Concurrency Theory
Forward and backward simulations -- Part II: timing-based systems.
Forward and backward simulations -- Part II: timing-based systems.
Proceedings of the 38th conference on Winter simulation
AIS'04 Proceedings of the 13th international conference on AI, Simulation, and Planning in High Autonomy Systems
A formal verification approach for DEVS
Proceedings of the 2007 Summer Computer Simulation Conference
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The hierarchy of formalism presented in this paper is part of an on going work in the development of a broad hierarchy of DEVS based formalisms. We introduce a hierarchy of formalisms with different temporal restrictions targeted to the discrete event community. The goal of this formalism hierarchy is to introduce and clarify some timed or temporal concepts that arises in the design of discrete event control systems. All formalism presented are inspired in the same syntax, that of DEVS formalism, and share the same coupling structure with it.