Structure of parallel multipliers for a class of fields GF(2m)
Information and Computation
Low-Complexity Bit-Parallel Canonical and Normal Basis Multipliers for a Class of Finite Fields
IEEE Transactions on Computers
New directions in cryptography
IEEE Transactions on Information Theory
Bit-serial Reed - Solomon encoders
IEEE Transactions on Information Theory
A public key cryptosystem and a signature scheme based on discrete logarithms
IEEE Transactions on Information Theory
Utilization of Pipeline Technique in AOP Based Multipliers with Parallel Inputs
Journal of Signal Processing Systems
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This paper presents a new inner product AB^2 multiplication algorithm and effective hardware architecture for exponentiation in finite fields GF(2^m). Exponentiation is more efficiently implemented by applying AB^2 multiplication repeatedly rather than AB multiplication. Thus, efficient AB^2 multiplication algorithms and simple architectures are the key to implementing exponentiation. Accordingly, this paper proposes an efficient inner product multiplication algorithm based on an irreducible all one polynomial (AOP) and simple architecture, which has the same hardware equipment as Fenn's AB multiplier. The proposed bit-serial multiplication algorithm and architecture are highly regular and simpler than those of previous works.