Structure of parallel multipliers for a class of fields GF(2m)

Modular Construction of Low Complexity Parallel Multipliers for a Class of Finite Fields GF(2/sup m/)

IEEE Transactions on Computers - Special issue on computer arithmetic

Efficient Multiplier Architectures for Galois Fields GF(24n)

IEEE Transactions on Computers

Low-Complexity Bit-Parallel Canonical and Normal Basis Multipliers for a Class of Finite Fields

IEEE Transactions on Computers

Low Complexity Bit-Parallel Multipliers for a Class of Finite Fields

IEEE Transactions on Computers

On-Line Error Detection for Bit-Serial Multipliers in GF(2m)

Journal of Electronic Testing: Theory and Applications

A New Representation of Elements of Finite Fields GF(2m) Yielding Small Complexity Arithmetic Circuits

IEEE Transactions on Computers

New Low-Complexity Bit-Parallel Finite Field Multipliers Using Weakly Dual Bases

IEEE Transactions on Computers

Mastrovito Multiplier for General Irreducible Polynomials

IEEE Transactions on Computers

Look-Up Table-Based Large Finite Field Multiplication in Memory Constrained Cryptosystems

IEEE Transactions on Computers - Special issue on computer arithmetic

An Efficient Optimal Normal Basis Type II Multiplier

IEEE Transactions on Computers

Bit-Parallel Systolic Multipliers for GF(2m) Fields Defined by All-One and Equally Spaced Polynomials

IEEE Transactions on Computers

Systematic Design of Original and Modified Mastrovito Multipliers for General Irreducible Polynomials

IEEE Transactions on Computers

On the Inherent Space Complexity of Fast Parallel Multipliers for GF(2/supm/)

IEEE Transactions on Computers

A new hardware architecture for operations In GF (2m)

IEEE Transactions on Computers

A New Construction of Massey-Omura Parallel Multiplier over GF(2^{m})

IEEE Transactions on Computers

Itoh-Tsujii Inversion in Standard Basis and Its Application in Cryptography and Codes

Designs, Codes and Cryptography

A New Hardware Architecture for Operations in GF(2m)

IEEE Transactions on Computers

A Modified Massey-Omura Parallel Multiplier for a Class of Finite Fields

IEEE Transactions on Computers

A New Architecture for a Parallel Finite Field Multiplier with Low Complexity Based on Composite Fields

IEEE Transactions on Computers

Finite Field Multiplier Using Redundant Representation

IEEE Transactions on Computers

On "A New Representation of Elements of Finite Fields GF (2^m) Yielding Small Complexity Arithmetic Circuits"

IEEE Transactions on Computers

Mastrovito Multiplier for General Irreducible Polynomials

AAECC-13 Proceedings of the 13th International Symposium on Applied Algebra, Algebraic Algorithms and Error-Correcting Codes

Low Complexity Bit Serial Systolic Multipliers over GF(2m) for Three Classes of Finite Fields

ICICS '02 Proceedings of the 4th International Conference on Information and Communications Security

Parallel Algorithm and Architecture for Public-Key Cryptosystem

EurAsia-ICT '02 Proceedings of the First EurAsian Conference on Information and Communication Technology

A Secure Family of Composite Finite Fields Suitable for Fast Implementation of Elliptic Curve Cryptography

INDOCRYPT '01 Proceedings of the Second International Conference on Cryptology in India: Progress in Cryptology

Bit-Serial AOP Arithmetic Architectures over GF (2m)

InfraSec '02 Proceedings of the International Conference on Infrastructure Security

Low Complexity Bit-Parallel Finite Field Arithmetic Using Polynomial Basis

CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems

A New Low Complexity Parallel Multiplier for a Class of Finite Fields

CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems

A Redundant Representation of GF(q^n) for Designing Arithmetic Circuits

IEEE Transactions on Computers

Low complexity bit-parallel systolic architecture for computing C + AB2 over a class of GF(2m)

Integration, the VLSI Journal

Ringed bit-parallel systolic multipliers over a class of fields GF(2m)

Integration, the VLSI Journal

Low Complexity Bit-Parallel Multiplier for GF(2^m) Defined by All-One Polynomials Using Redundant Representation

IEEE Transactions on Computers

Bit-Parallel Finite Field Multipliers for Irreducible Trinomials

IEEE Transactions on Computers

Efficient Reconfigurable Implementation of Canonical and Normal Basis Multipliers Over Galois Fields GF(2m) Generated by AOPs

Journal of VLSI Signal Processing Systems

Concurrent Error Detection in a Polynomial Basis Multiplier over GF(2m)

Journal of Electronic Testing: Theory and Applications

LFSR multipliers over GF(2m) defined by all-one polynomial

Integration, the VLSI Journal

Extractors for binary elliptic curves

Designs, Codes and Cryptography

A novel approach for bit-serial AB2 multiplication in finite fields GF(2m)

Computers & Mathematics with Applications

Semi-systolic Modular Multiplier over GF(2m)

ICCSA '08 Proceedings of the international conference on Computational Science and Its Applications, Part II

Area and time efficient AB2 multipliers based on cellular automata

Computer Standards & Interfaces

Montgomery exponent architecture based on programmable cellular automata

Mathematics and Computers in Simulation

An optimized design for serial-parallel finite field multiplication over GF(2m) based on all-one polynomials

Proceedings of the 2009 Asia and South Pacific Design Automation Conference

Scalable and Systolic Montgomery Multipliers over GF(2m)

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Unified parallel systolic multiplier over GF(2m)

Journal of Computer Science and Technology

Low-complexity bit-parallel dual basis multipliers using the modified Booth's algorithm

Computers and Electrical Engineering

Ringed bit-parallel systolic multipliers over a class of fields GF(2m)

Integration, the VLSI Journal

Low-complexity bit-parallel multipliers for a class of GF(2m) based on modified Booth's algorithm

International Journal of Computers and Applications

Efficient architecture for exponentiation and division in GF(2m) using irreducible AOP

ICCSA'03 Proceedings of the 2003 international conference on Computational science and its applications: PartI

Computational algorithm and architecture for AB2 multiplication in finite fields

ICCSA'03 Proceedings of the 2003 international conference on Computational science and its applications: PartI

Type-II optimal polynomial bases

WAIFI'10 Proceedings of the Third international conference on Arithmetic of finite fields

Multiplexer implementation of low-complexity polynomial basis multiplier in GF(2m) using all one polynomial

Information Processing Letters

Semi-systolic architecture for modular multiplication over GF(2m)

ICCS'05 Proceedings of the 5th international conference on Computational Science - Volume Part III

Modified serial multipliers for Type-IV gaussian normal bases

INDOCRYPT'05 Proceedings of the 6th international conference on Cryptology in India

Unidirectional two dimensional systolic array for multiplication in GF(2m) using LSB first algorithm

WILF'05 Proceedings of the 6th international conference on Fuzzy Logic and Applications

Low complexity bit-parallel polynomial basis multipliers over binary fields for special irreducible pentanomials

Integration, the VLSI Journal

Low-power and high-speed design of a versatile bit-serial multiplier in finite fields GF(2m)

Integration, the VLSI Journal

Quantum binary field inversion: improved circuit depth via choice of basis representation

Quantum Information & Computation

Low-complexity multiplier for GF(2m) based on all-one polynomials

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Utilization of Pipeline Technique in AOP Based Multipliers with Parallel Inputs

Journal of Signal Processing Systems

Efficient quantum circuits for binary elliptic curve arithmetic: reducing T-gate complexity

Quantum Information & Computation

Novel bit-parallel multiplier for GF(2m) defined by all-one polynomial using generalized Karatsuba algorithm

Information Processing Letters