Introduction to finite fields and their applications
Introduction to finite fields and their applications
Structure of parallel multipliers for a class of fields GF(2m)
Information and Computation
Efficient Exponentiation of a Primitive Root in GF(2m)
IEEE Transactions on Computers
Low-Complexity Bit-Parallel Canonical and Normal Basis Multipliers for a Class of Finite Fields
IEEE Transactions on Computers
Systolic Array Implementation of Euclid's Algorithm for Inversion and Division in GF (2m)
IEEE Transactions on Computers
Mastrovito Multiplier for All Trinomials
IEEE Transactions on Computers
Mastrovito Multiplier for General Irreducible Polynomials
IEEE Transactions on Computers
IEEE Transactions on Computers
GF(2m) Multiplication and Division Over the Dual Basis
IEEE Transactions on Computers
Bit-Parallel Finite Field Multiplier and Squarer Using Polynomial Basis
IEEE Transactions on Computers
VLSI Designs for Multiplication over Finite Fields GF (2m)
AAECC-6 Proceedings of the 6th International Conference, on Applied Algebra, Algebraic Algorithms and Error-Correcting Codes
Parallel Multipliers Based on Special Irreducible Pentanomials
IEEE Transactions on Computers
Efficient Algorithms and Architectures for Field Multiplication Using Gaussian Normal Bases
IEEE Transactions on Computers
Bit-Parallel Finite Field Multipliers for Irreducible Trinomials
IEEE Transactions on Computers
Low complexity bit-parallel multipliers based on a class of irreducible pentanomials
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Circuits and Systems II: Express Briefs
An efficient VLSI architecture for nonbinary LDPC decoders
IEEE Transactions on Circuits and Systems II: Express Briefs
Efficient decoder design for nonbinary quasicyclic LDPC codes
IEEE Transactions on Circuits and Systems Part I: Regular Papers - Special issue on ISCAS 2009
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Low complexity bit parallel architectures for polynomial basis multiplication over GF(2m)
IEEE Transactions on Computers
New efficient bit-parallel polynomial basis multiplier for special pentanomials
Integration, the VLSI Journal
| Hi-index | 0.00 |
Finite field GF(2^m) arithmetic is becoming increasingly important for a variety of different applications including cryptography, error coding theory and computer algebra. Among finite field arithmetic operations, GF(2^m) multiplication is of special interest because it is considered the most important building block. GF(2^m) multipliers present reduced space and time complexities when the field is generated by some special irreducible polynomials. Among these, irreducible pentanomials of degree m are specially important because they are abundant and there are several eligible candidates for a given m. In this paper, we consider bit-parallel polynomial basis multipliers over the finite field GF(2^m) generated using type 2 irreducible pentanomials, for which explicit formulas and algorithms for the computation of the products are given. In this contribution, two new subclasses of type 2 irreducible pentanomials are also introduced. The theoretical complexity analysis proves that the bit-parallel multipliers here presented have the lowest number of XOR gates known to date for similar polynomial basis multipliers based on this type of irreducible pentanomials, while the number of AND gates and the time complexity match the best known results found in the literature.