VLSI Architectures for Computing Multiplications and Inverses in GF(2m)
IEEE Transactions on Computers
Introduction to finite fields and their applications
Introduction to finite fields and their applications
Optimal normal bases in GF(pn)
Discrete Applied Mathematics
A VLSI Architecture for Fast Inversion in GF(2/sup m/)
IEEE Transactions on Computers
An Algorithm to Design Finite Field Multipliers Using a Self-Dual Normal Basis
IEEE Transactions on Computers
Discrete Applied Mathematics
Implementing elliptic curve cryptography
Implementing elliptic curve cryptography
Low-Energy Digit-Serial/Parallel Finite Field Multipliers
Journal of VLSI Signal Processing Systems - Special issue on application specific systems, architectures and processors
Algorithms for exponentiation in finite fields
Journal of Symbolic Computation
An Efficient Optimal Normal Basis Type II Multiplier
IEEE Transactions on Computers
On the Inherent Space Complexity of Fast Parallel Multipliers for GF(2/supm/)
IEEE Transactions on Computers
A New Construction of Massey-Omura Parallel Multiplier over GF(2^{m})
IEEE Transactions on Computers
A Search of Minimal Key Functions for Normal Basis Multipliers
IEEE Transactions on Computers
Symmetry and Duality in Normal Basis Multiplication
AAECC-6 Proceedings of the 6th International Conference, on Applied Algebra, Algebraic Algorithms and Error-Correcting Codes
Efficient Software Implementation for Finite Field Multiplication in Normal Basis
ICICS '01 Proceedings of the Third International Conference on Information and Communications Security
Fast Normal Basis Multiplication Using General Purpose Processors
IEEE Transactions on Computers
Efficient digit-serial normal basis multipliers over binary extension fields
ACM Transactions on Embedded Computing Systems (TECS)
Low Complexity Word-Level Sequential Normal Basis Multipliers
IEEE Transactions on Computers
Software Multiplication Using Gaussian Normal Bases
IEEE Transactions on Computers
Modified sequential normal basis multipliers for type II optimal normal bases
ICCSA'05 Proceedings of the 2005 international conference on Computational Science and Its Applications - Volume Part II
Software Multiplication Using Gaussian Normal Bases
IEEE Transactions on Computers
A Novel Architecture for Galois Fields GF(2^m) Multipliers Based on Mastrovito Scheme
IEEE Transactions on Computers
On complexity of normal basis multiplier using modified Booth's algorithm
AIC'07 Proceedings of the 7th Conference on 7th WSEAS International Conference on Applied Informatics and Communications - Volume 7
On complexity of normal basis multiplier using modified Booth's algorithm
AIC'07 Proceedings of the 7th Conference on 7th WSEAS International Conference on Applied Informatics and Communications - Volume 7
Software Implementation of Arithmetic in
WAIFI '07 Proceedings of the 1st international workshop on Arithmetic of Finite Fields
Concurrent error detection architectures for Gaussian normal basis multiplication over GF(2m)
Integration, the VLSI Journal
A modified low complexity digit-level Gaussian normal basis multiplier
WAIFI'10 Proceedings of the Third international conference on Arithmetic of finite fields
Scalable Gaussian Normal Basis Multipliers over GF(2m) Using Hankel Matrix-Vector Representation
Journal of Signal Processing Systems
Integration, the VLSI Journal
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 14.99 |
Recently, implementations of normal basis multiplication over the extended binary field GF(2^{m}) have received considerable attention. A class of low complexity normal bases called Gaussian normal bases has been included in a number of standards, such as IEEE [1] and NIST [2] for an elliptic curve digital signature algorithm. The multiplication algorithms presented there are slow in software since they rely on bit-wise inner product operations. In this paper, we present two vector-level software algorithms which essentially eliminate such bit-wise operations for Gaussian normal bases. Our analysis and timing results show that the software implementation of the proposed algorithm is faster than previously reported normal basis multiplication algorithms. The proposed algorithm is also more memory efficient compared with its look-up table-based counterpart. Moreover, two new digit-level multiplier architectures are proposed and it is shown that they outperform the existing normal basis multiplier structures. As compared with similar digit-level normal basis multipliers, the proposed multiplier with serial output requires the fewest number of XOR gates and the one with parallel output is the fastest multiplier.