Fault tolerant and fault testable hardware design
Fault tolerant and fault testable hardware design
Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
VLSI Architectures for Computing Multiplications and Inverses in GF(2m)
IEEE Transactions on Computers
Introduction to finite fields and their applications
Introduction to finite fields and their applications
On-Line Error Detection for Bit-Serial Multipliers in GF(2m)
Journal of Electronic Testing: Theory and Applications
Normal bases via general Gauss periods
Mathematics of Computation
Fast Algorithms for Digital Signal Processing
Fast Algorithms for Digital Signal Processing
A New Construction of Massey-Omura Parallel Multiplier over GF(2^{m})
IEEE Transactions on Computers
A Search of Minimal Key Functions for Normal Basis Multipliers
IEEE Transactions on Computers
Finite Field Multiplier Using Redundant Representation
IEEE Transactions on Computers
Differential Fault Analysis of Secret Key Cryptosystems
CRYPTO '97 Proceedings of the 17th Annual International Cryptology Conference on Advances in Cryptology
Low Cost Attacks on Tamper Resistant Devices
Proceedings of the 5th International Workshop on Security Protocols
Power Analysis Attacks of Modular Exponentiation in Smartcards
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
Resistance against Differential Power Analysis for Elliptic Curve Cryptosystems
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
IEEE Transactions on Computers
Efficient digit-serial normal basis multipliers over binary extension fields
ACM Transactions on Embedded Computing Systems (TECS)
Low-Complexity Bit-Parallel Systolic Montgomery Multipliers for Special Classes of GF(2^m)
IEEE Transactions on Computers
Concurrent Error Detection in a Bit-Parallel Systolic Multiplier for Dual Basis of GF(2m)
Journal of Electronic Testing: Theory and Applications
Efficient Algorithms and Architectures for Field Multiplication Using Gaussian Normal Bases
IEEE Transactions on Computers
Concurrent Error Detection in a Polynomial Basis Multiplier over GF(2m)
Journal of Electronic Testing: Theory and Applications
Fault Detection Architectures for Field Multiplication Using Polynomial Bases
IEEE Transactions on Computers
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Concurrent Error Detection in Montgomery Multiplication over GF(2m)
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
On concurrent detection of errors in polynomial basis multiplication
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Unified parallel systolic multiplier over GF(2m)
Journal of Computer Science and Technology
On the importance of checking cryptographic protocols for faults
EUROCRYPT'97 Proceedings of the 16th annual international conference on Theory and application of cryptographic techniques
Concurrent error detection architectures for field multiplication using gaussian normal basis
ISPEC'10 Proceedings of the 6th international conference on Information Security Practice and Experience
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This paper presents a method of using a parity prediction scheme for detecting erroneous outputs in bit-parallel, sequential, and digit-serial Gaussian normal basis (GNB) multipliers over GF(2^m). Although all-type NB multipliers have different time and space complexities, our analytical results indicate that all-type GNB multipliers have the same structure if they use parity prediction function. For example, in the field GF(2^2^3^3), we have estimated that the error detection rate for a sequential multiplier is nearly 100% if a comparison is made as per clock cycle. Our analytical results also show that the area overhead of the proposed digit-serial multiplier with concurrent error detection does not exceed 5%. Several efficient parity prediction techniques will be shown in this work to provide a low overhead solution to concurrent error detection particularly when the cryptography implementations using GF(2^m) multiplier require higher reliability and the protection against adversarial attacks.