Introduction to finite fields and their applications
Introduction to finite fields and their applications
A High-Speed DES Implementation for Network Applications
CRYPTO '92 Proceedings of the 12th Annual International Cryptology Conference on Advances in Cryptology
Fault-Based Side-Channel Cryptanalysis Tolerant Rijndael Symmetric Block Cipher Architecture
DFT '01 Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems
A Parity Code Based Fault Detection for an Implementation of the Advanced Encryption Standard
DFT '02 Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems
A Fast New DES Implementation in Software
FSE '97 Proceedings of the 4th International Workshop on Fast Software Encryption
CARDIS '98 Proceedings of the The International Conference on Smart Card Research and Applications
ASAP '02 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
Concurrent Error Detection in a Bit-Parallel Systolic Multiplier for Dual Basis of GF(2m)
Journal of Electronic Testing: Theory and Applications
A Totally Self-Checking S-box Architecture for the Advanced Encryption Standard
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Concurrent Error Detection in a Polynomial Basis Multiplier over GF(2m)
Journal of Electronic Testing: Theory and Applications
Simple Error Detection Methods for Hardware Implementation of Advanced Encryption Standard
IEEE Transactions on Computers
Fault Detection Architectures for Field Multiplication Using Polynomial Bases
IEEE Transactions on Computers
Robust codes and robust, fault-tolerant architectures of the Advanced Encryption Standard
Journal of Systems Architecture: the EUROMICRO Journal
An Operation-Centered Approach to Fault Detection in Symmetric Cryptography Ciphers
IEEE Transactions on Computers
Proceedings of the conference on Design, automation and test in Europe
On concurrent detection of errors in polynomial basis multiplication
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Differential fault analysis on the ARIA algorithm
Information Sciences: an International Journal
Error detection and error correction procedures for the advanced encryption standard
Designs, Codes and Cryptography
High-Performance Concurrent Error Detection Scheme for AES Hardware
CHES '08 Proceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems
A Lightweight Concurrent Fault Detection Scheme for the AES S-Boxes Using Normal Basis
CHES '08 Proceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems
Differential fault analysis on the contracting UFN structure, with application to SMS4 and MacGuffin
Journal of Systems and Software
Novel PUF-Based Error Detection Methods in Finite State Machines
Information Security and Cryptology --- ICISC 2008
An algorithm based mesh check-sum fault tolerant scheme for stream ciphers
International Journal of Communication Networks and Distributed Systems
A mesh check-sum ABFT scheme for stream ciphers
International Journal of Communication Networks and Distributed Systems
A Reliable Architecture for Parallel Implementations of the Advanced Encryption Standard
Journal of Electronic Testing: Theory and Applications
Journal of Electronic Testing: Theory and Applications
A compact ASIC implementation of the advanced encryption standard with concurrent error detection
CSS '07 Proceedings of the Fifth IASTED International Conference on Circuits, Signals and Systems
Concurrent error detection architectures for Gaussian normal basis multiplication over GF(2m)
Integration, the VLSI Journal
Non-linear Error Detection for Finite State Machines
Information Security Applications
Differential fault analysis on Camellia
Journal of Systems and Software
Design and implementation of robust embedded processor for cryptographic applications
Proceedings of the 3rd international conference on Security of information and networks
Countermeasures against fault attacks on software implemented AES: effectiveness and cost
WESS '10 Proceedings of the 5th Workshop on Embedded Systems Security
Investigation of fault propagation in encryption of satellite images using the AES algorithm
MILCOM'06 Proceedings of the 2006 IEEE conference on Military communications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A compact AES core with on-line error-detection for FPGA applications with modest hardware resources
Microprocessors & Microsystems
International Journal of Applied Mathematics and Computer Science
A fault attack against the FOX cipher family
FDTC'06 Proceedings of the Third international conference on Fault Diagnosis and Tolerance in Cryptography
Cryptographic key reliable lifetimes: bounding the risk of key exposure in the presence of faults
FDTC'06 Proceedings of the Third international conference on Fault Diagnosis and Tolerance in Cryptography
A comparative cost/security analysis of fault attack countermeasures
FDTC'06 Proceedings of the Third international conference on Fault Diagnosis and Tolerance in Cryptography
Fault attack resistant cryptographic hardware with uniform error detection
FDTC'06 Proceedings of the Third international conference on Fault Diagnosis and Tolerance in Cryptography
An emerging threat: eve meets a robot
INTRUST'10 Proceedings of the Second international conference on Trusted Systems
Fresh re-keying II: securing multiple parties against side-channel and fault attacks
CARDIS'11 Proceedings of the 10th IFIP WG 8.8/11.2 international conference on Smart Card Research and Advanced Applications
Invariance-based concurrent error detection for advanced encryption standard
Proceedings of the 49th Annual Design Automation Conference
Error detecting AES using polynomial residue number systems
Microprocessors & Microsystems
Fault analysis study of the block cipher FOX64
Multimedia Tools and Applications
Cross-layer analysis of protocol delay in mobile devices receiving BCMCS
Wireless Networks
A fault-resistant implementation of AES using differential bytes between input and output
The Journal of Supercomputing
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The goal of the Advanced Encryption Standard (AES) is to achieve secure communication. The use of AES does not, however, guarantee reliable communication. Prior work has shown that even a single transient error occurring during the AES encryption (or decryption) process will very likely result in a large number of errors in the encrypted/decrypted data. Such faults must be detected before sending to avoid the transmission and use of erroneous data. Concurrent fault detection is important not only to protect the encryption/decryption process from random faults. It will also protect the encryption/decryption circuitry from an attacker who may maliciously inject faults in order to find the encryption secret key. In this paper, we first describe some studies of the effects that faults may have on a hardware implementation of AES by analyzing the propagation of such faults to the outputs. We then present two fault detection schemes: The first is a redundancy-based scheme while the second uses an error detecting code. The latter is a novel scheme which leads to very efficient and high coverage fault detection. Finally, the hardware costs and detection latencies of both schemes are estimated.