Construction and distribution problems for irreducible trinomials over finite fields
Applications of finite fields
Low-Complexity Bit-Parallel Canonical and Normal Basis Multipliers for a Class of Finite Fields
IEEE Transactions on Computers
Montgomery Multiplication in GF(2^k
Designs, Codes and Cryptography
Mastrovito Multiplier for All Trinomials
IEEE Transactions on Computers
IEEE Transactions on Computers
Cryptography and Secure Communications
Cryptography and Secure Communications
Montgomery Multiplier and Squarer for a Class of Finite Fields
IEEE Transactions on Computers
Bit-Level Systolic Array for Fast Exponentiation in GF(2/sup m/)
IEEE Transactions on Computers
IEEE Transactions on Computers
Efficient Multiplication in GF(pk) for Elliptic Curve Cryptography
ARITH '03 Proceedings of the 16th IEEE Symposium on Computer Arithmetic (ARITH-16'03)
Inversion/Division Systolic Architecture for Public-Key Cryptosystems in GF(2m)
ISC '02 Proceedings of the 5th International Conference on Information Security
Low-complexity bit-parallel systolic multipliers over GF(2m)
Integration, the VLSI Journal
Versatile multiplier architectures in GF(2k) fields using the Montgomery multiplication algorithm
Integration, the VLSI Journal
Digit-Serial Structures for the Shifted Polynomial Basis Multiplication over Binary Extension Fields
WAIFI '08 Proceedings of the 2nd international workshop on Arithmetic of Finite Fields
Montgomery exponent architecture based on programmable cellular automata
Mathematics and Computers in Simulation
Computers and Electrical Engineering
Combined circuit architecture for computing normal basis and montgomery multiplications over GF(2m)
Mobility '08 Proceedings of the International Conference on Mobile Technology, Applications, and Systems
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Scalable and Systolic Montgomery Multipliers over GF(2m)
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Low-complexity bit-parallel multiplier over GF(2m) using dual basis representation
Journal of Computer Science and Technology
Concurrent error detection architectures for Gaussian normal basis multiplication over GF(2m)
Integration, the VLSI Journal
Dual-residue montgomery multiplication
NPC'07 Proceedings of the 2007 IFIP international conference on Network and parallel computing
Efficient bit-parallel multipliers over finite fields GF(2m)
Computers and Electrical Engineering
Low complexity digit serial systolic montgomery multipliers for special class of GF(2m)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Combined circuit architecture for computing normal basis and Montgomery multiplications over GF(2m)
International Journal of Autonomous and Adaptive Communications Systems
Scalable Gaussian Normal Basis Multipliers over GF(2m) Using Hankel Matrix-Vector Representation
Journal of Signal Processing Systems
Low-complexity multiplier for GF(2m) based on all-one polynomials
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Low latency systolic montgomery multiplier for finite field GF(2m) based on pentanomials
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hi-index | 14.98 |
Recently, cryptographic applications based on finite fields have attracted much interest. This paper presents a transformation method to implement low-complexity Montgomery multipliers for all-one polynomials and trinomials. Using this method, we proposed a new bit-parallel systolic architecture for computing multiplications over GF(2^m). These new multipliers have a latency m+1 clock cycles and each cell incorporates at most one 2-input AND gate, two 2-input XOR gates, and four 1-bit latches. Moreover, these new multipliers are shown to exhibit significantly lower latency and circuit complexity than the related systolic multipliers and are highly appropriate for VLSI systems because of their regular interconnection pattern, modular structure, and fully inherent parallelism.