Efficient bit-parallel multipliers over finite fields GF(2m)

  • Authors:
  • Chiou-Yng Lee;Pramod Kumar Meher

  • Affiliations:
  • Department of Computer Information and Network Engineering, Lunghwa University of Science and Technology, Taoyuan County 333, Taiwan, ROC;Department of Communication Systems, Institute for Infocomm Research, 1 Fusionopolis Way, Singapore 138632, Singapore

  • Venue:
  • Computers and Electrical Engineering
  • Year:
  • 2010

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Abstract

Hardware implementation of multiplication in finite field GF(2^m) based on sparse polynomials is found to be advantageous in terms of space-complexity as well as the time-complexity. In this paper, we present a new permutation method to construct the irreducible like-trinomials of the form (x+1)^m+(x+1)^n+1 for the implementation of efficient bit-parallel multipliers. For implementing the multiplications based on such polynomials, we have defined a like-polynomial basis (LPB) as an alternative to the original polynomial basis of GF(2^m). We have shown further that the modular arithmetic for the binary field based on like-trinomials is equivalent to the arithmetic for the field based on trinomials. In order to design multipliers for composite fields, we have found another permutation polynomial to convert irreducible polynomials into like-trinomials of the forms (x^2+x+1)^m+(x^2+x+1)^n+1, (x^2+x)^m+(x^2+x)^n+1 and (x^4+x+1)^m+(x^4+x+1)^n+1. The proposed bit-parallel multiplier over GF(2^4^m) is found to offer a saving of about 33% multiplications and 42.8% additions over the corresponding existing architectures.