VLSI array processors
Optimal normal bases in GF(pn)
Discrete Applied Mathematics
Low-Energy Digit-Serial/Parallel Finite Field Multipliers
Journal of VLSI Signal Processing Systems - Special issue on application specific systems, architectures and processors
Fast Arithmetic for Public-Key Algorithms in Galois Fields with Composite Exponents
IEEE Transactions on Computers
IEEE Transactions on Computers
Cryptography and Secure Communications
Cryptography and Secure Communications
Handbook of Applied Cryptography
Handbook of Applied Cryptography
A Modified Massey-Omura Parallel Multiplier for a Class of Finite Fields
IEEE Transactions on Computers
Finite Field Multiplier Using Redundant Representation
IEEE Transactions on Computers
A Scalable Architecture for Montgomery Multiplication
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
ARITH '03 Proceedings of the 16th IEEE Symposium on Computer Arithmetic (ARITH-16'03)
Fast Normal Basis Multiplication Using General Purpose Processors
IEEE Transactions on Computers
Low Complexity Word-Level Sequential Normal Basis Multipliers
IEEE Transactions on Computers
Low-Complexity Bit-Parallel Systolic Montgomery Multipliers for Special Classes of GF(2^m)
IEEE Transactions on Computers
A digit-serial multiplier for finite field GF(2m)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient Algorithms and Architectures for Field Multiplication Using Gaussian Normal Bases
IEEE Transactions on Computers
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
A New Approach to Subquadratic Space Complexity Parallel Multipliers for Extended Binary Fields
IEEE Transactions on Computers
IEEE Transactions on Computers
Concurrent Error Detection and Correction in Gaussian Normal Basis Multiplier over GF(2^m)
IEEE Transactions on Computers
CMOS Digital Integrated Circuits Analysis & Design
CMOS Digital Integrated Circuits Analysis & Design
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This work presents a novel scalable multiplication algorithm for a type-t Gaussian normal basis (GNB) of GF(2m). Utilizing the basic characteristics of MSD-first and LSD-first schemes with d-bit digit size, the GNB multiplication can be decomposed into n(n驴+驴1) Hankel matrix-vector multiplications. where n驴=驴(mt驴+驴1)/d. The proposed scalable architectures for computing GNB multiplication comprise of one d驴脳驴d Hankel multiplier, four registers and one final reduction polynomial circuit. Using the relationship of the basis conversion from the GNB to the normal basis, we also present the modified scalable multiplier which requires only nk Hankel multiplications, where k驴=驴mt/2d if m is even or k驴=驴(mt驴驴驴t驴+驴2)/2d if m is odd. The developed scalable multipliers have the feature of scalability. It is shown that, as the selected digit size d驴驴驴8, the proposed scalable architectures have significantly lower time-area complexity than existing digit-serial multipliers. Moreover, the proposed architectures have the features of regularity, modularity, and local interconnection ability. Accordingly, they are well suited for VLSI implementation.