Discrete logarithms in finite fields and their cryptographic significance
Proc. of the EUROCRYPT 84 workshop on Advances in cryptology: theory and application of cryptographic techniques
Structure of parallel multipliers for a class of fields GF(2m)
Information and Computation
IEEE Transactions on Computers - Special issue on computer arithmetic
Low-Complexity Bit-Parallel Canonical and Normal Basis Multipliers for a Class of Finite Fields
IEEE Transactions on Computers
Low Complexity Bit-Parallel Multipliers for a Class of Finite Fields
IEEE Transactions on Computers
IEEE Transactions on Computers
New Low-Complexity Bit-Parallel Finite Field Multipliers Using Weakly Dual Bases
IEEE Transactions on Computers
Cryptography and data security
Cryptography and data security
A Systolic Power-Sum Circuit for GF(2/sup m/)
IEEE Transactions on Computers
Bit-Level Systolic Array for Fast Exponentiation in GF(2/sup m/)
IEEE Transactions on Computers
Low Complexity Bit Serial Systolic Multipliers over GF(2m) for Three Classes of Finite Fields
ICICS '02 Proceedings of the 4th International Conference on Information and Communications Security
Bit-Serial AOP Arithmetic Architectures over GF (2m)
InfraSec '02 Proceedings of the International Conference on Infrastructure Security
Low Complexity Multiplication in a Finite Field Using Ring Representation
IEEE Transactions on Computers
Hardware architectures for public key cryptography
Integration, the VLSI Journal
Low complexity bit-parallel systolic architecture for computing C + AB2 over a class of GF(2m)
Integration, the VLSI Journal
Low-Complexity Bit-Parallel Systolic Montgomery Multipliers for Special Classes of GF(2^m)
IEEE Transactions on Computers
Ringed bit-parallel systolic multipliers over a class of fields GF(2m)
Integration, the VLSI Journal
Concurrent Error Detection in a Bit-Parallel Systolic Multiplier for Dual Basis of GF(2m)
Journal of Electronic Testing: Theory and Applications
IEEE Transactions on Computers
Concurrent Error Detection in a Polynomial Basis Multiplier over GF(2m)
Journal of Electronic Testing: Theory and Applications
LFSR multipliers over GF(2m) defined by all-one polynomial
Integration, the VLSI Journal
Low-complexity bit-parallel systolic multipliers over GF(2m)
Integration, the VLSI Journal
On complexity of normal basis multiplier using modified Booth's algorithm
AIC'07 Proceedings of the 7th Conference on 7th WSEAS International Conference on Applied Informatics and Communications - Volume 7
On complexity of normal basis multiplier using modified Booth's algorithm
AIC'07 Proceedings of the 7th Conference on 7th WSEAS International Conference on Applied Informatics and Communications - Volume 7
Multiplexer-based bit-parallel systolic multipliers over GF(2m)
Computers and Electrical Engineering
Computers and Electrical Engineering
Combined circuit architecture for computing normal basis and montgomery multiplications over GF(2m)
Mobility '08 Proceedings of the International Conference on Mobile Technology, Applications, and Systems
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Scalable and Systolic Montgomery Multipliers over GF(2m)
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Unified parallel systolic multiplier over GF(2m)
Journal of Computer Science and Technology
Low-complexity bit-parallel multiplier over GF(2m) using dual basis representation
Journal of Computer Science and Technology
Low-complexity bit-parallel dual basis multipliers using the modified Booth's algorithm
Computers and Electrical Engineering
Ringed bit-parallel systolic multipliers over a class of fields GF(2m)
Integration, the VLSI Journal
Low-complexity bit-parallel multipliers for a class of GF(2m) based on modified Booth's algorithm
International Journal of Computers and Applications
Test generation in systolic architecture for multiplication over GF(2m)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Combined circuit architecture for computing normal basis and Montgomery multiplications over GF(2m)
International Journal of Autonomous and Adaptive Communications Systems
Information Processing Letters
ICCSA'05 Proceedings of the 2005 international conference on Computational Science and its Applications - Volume Part I
Unidirectional two dimensional systolic array for multiplication in GF(2m) using LSB first algorithm
WILF'05 Proceedings of the 6th international conference on Fuzzy Logic and Applications
Scalable Gaussian Normal Basis Multipliers over GF(2m) Using Hankel Matrix-Vector Representation
Journal of Signal Processing Systems
Low-power and high-speed design of a versatile bit-serial multiplier in finite fields GF(2m)
Integration, the VLSI Journal
Low-complexity multiplier for GF(2m) based on all-one polynomials
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Utilization of Pipeline Technique in AOP Based Multipliers with Parallel Inputs
Journal of Signal Processing Systems
| Hi-index | 14.99 |
Two operations, the cyclic shifting and the inner product, are defined by the properties of irreducible all one polynomials. An effective algorithm is proposed for computing multiplications over a class of fields $GF(2^m)$ using the two operations. Then, two low-complexity bit-parallel systolic multipliers are presented based on the algorithm. The first multiplier is composed of $(m+1)^2$ identical cells, each consisting of one 2-input AND gate, one 2-input XOR gate, and three 1-bit latches. The other multiplier comprises of $(m+1)^2$ identical cells and mXOR gates. Each cell consists of one 2-input AND gate, one 2-input XOR gate, and four 1-bit latches. Each multiplier exhibits very low latency and propagation delay and is thus very fast. Moreover, the architectures of the two multipliers can be applied in computing multiplications over the class of fields $GF(2^m)$ in which the elements are represented with the root of an irreducible equally spaced polynomial of degree m.