Low-complexity bit-parallel dual basis multipliers using the modified Booth's algorithm

Authors:
Chiou-Yng Lee;Che Wun Chiou;Jim-Min Lin
Affiliations:
Department of Computer Information and Network Engineering, Lunghwa University of Science and Technology, Taoyuan County 333, Taiwan, ROC;Department of Computer Science and Information Engineering, Ching Yun University, 229 Chien-Hsin Road, Chung-Li 320, Taiwan, ROC;Department of Information Engineering and Computer Science, Feng Chia University, Taichung City 407, Taiwan, ROC
Venue:
Computers and Electrical Engineering
Year:
2005

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Abstract

New bit-parallel dual basis multipliers using the modified Booth's algorithm are presented. Due to the advantage of the modified Booth's algorithm, two bits are processed in parallel for reduction of both space and time complexities. A multiplexer-based structure has been proposed for realization of the proposed multiplication algorithm. We have shown that our multiplier saves about 9% space complexity as compared to other existing multipliers if the generating polynomial is trinomial or all one polynomial. Furthermore, the proposed multiplier is faster than existing multipliers.