Combined circuit architecture for computing normal basis and montgomery multiplications over GF(2m)

Authors:
Chin-Chin Chen;Chiou-Yng Lee;Erl-Huei Lu
Affiliations:
Chang Gung University, Taoyuan, Taoyuan County, Taiwan (R.O.C.);Lunghwa University of Science and Technology, Guishan, Taoyuan County, Taiwan, R.O.C.;Chang Gung University, Kwei-Shan, Tao-Yuan, Taiwan, R.O.C.
Venue:
Mobility '08 Proceedings of the International Conference on Mobile Technology, Applications, and Systems
Year:
2008

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Abstract

Normal basis and Montgomery multiplications are two popular arithmetic operations in GF(2m). In general, each element representation has its associated different algorithm and hardware multiplication architectures. In this paper, we will present a new combined circuit for computing normal basis and Montgomery multiplications, which is based on a Hankel multiplication. The results reveal that our proposed multiplier has lower space complexity as compared to existing systolic normal basis and Montgomery multipliers. Moreover, the proposed architecture has the features of regularity, modularity and local interconnect ability. Accordingly, it is well suited for VLSI implementation.