Efficient Design of Low-Complexity Bit-Parallel Systolic Hankel Multipliers to Implement Multiplication in Normal and Dual Bases of GF (2m)

Authors:
Chiou-Yng Lee;Che-Wun Chiou
Affiliations:
The author is with the Department of Computer Information and Network Engineering, LungHwa University of Science Technology, Taiwan, ROC. E-mail: PP010@mail.lhu.edu.tw,;The author is with the Department of Electronic Engineering, Ching Yun University, Taiwan, ROC. E-mail: cwchiou@cyu.edu.tw
Venue:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Year:
2005

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Abstract

Normal and dual bases are two popular representation bases for elements in GF(2m). In general, each distinct representation basis has its associated different hardware architecture. In this paper, we will present a unified systolic array multiplication architecture for both normal and dual bases, such a unified multiplication architecture is termed a Hankel multiplier. The Hankel multiplier has lower space complexity while compared with other existing normal basis multipliers and dual basis multipliers.