Concurrent Error Detection in Multiplexer-Based Multipliers for Normal Basis of GF(2m) Using Double Parity Prediction Scheme

  • Authors:
  • Chiou-Yng Lee;Che Wun Chiou;Jim-Min Lin

  • Affiliations:
  • Department of Computer Information and Network Engineering, Lunghwa University of Science and Technology, Taiwan, Republic of China;Department of Computer Science and Information Engineering, Ching Yun University, Taiwan, Republic of China;Department of Information Engineering and Computer Science, Feng Chia University, Taiwan, Republic of China

  • Venue:
  • Journal of Signal Processing Systems
  • Year:
  • 2010

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Abstract

Successful implementation of elliptic curve cryptographic systems primarily depends on the efficient and reliable arithmetic circuits for finite fields with very large orders. Thus, the robust encryption/decryption algorithms are elegantly needed. Multiplication would be the most important finite field arithmetic operation. It is much more complex compared to the finite field addition. It is also frequently used in performing point operations in elliptic curve groups. The hardware implementation of a multiplication operation may require millions of logic gates and may thus lead to erroneous outputs. To obtain reliable cryptographic applications, a novel concurrent error detection (CED) architecture to detect erroneous outputs in multiplexer-based normal basis (NB) multiplier over GF(2 m ) using the parity prediction scheme is proposed in this article. Although various NB multipliers, depending on $$ \alpha \alpha^{{2^i }} = \sum\limits_{j = 0}^{m - 1} {t_{i,j} } \alpha^{{2^j }} $$ , have different time and space complexities, NB multipliers will have the same structure if they use a parity prediction function. By using the structure of the proposed CED NB multiplier, a CED scalable multiplier over composite fields with 100% error detection rate is also presented.