Low-complexity bit-parallel systolic multipliers over GF(2m)

Authors:
Chiou-Yng Lee
Affiliations:
Department of Electronic Engineering, Ching Yun University, 2F 105, Lane 437, Chung-Pei Road Sec. 2, Chung-Li, Taoyuan, Taiwan 320, ROC
Venue:
Integration, the VLSI Journal
Year:
2008

Citing 12
Cited 2

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The use of finite fields to compute convolutions

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More efficient systolic arrays for multiplication in GF(2m) using LSB first algorithm with irreducible polynomials and trinomials

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Abstract

This paper presents new time-dependent and time-independent multiplication algorithms over finite fields GF(2m) by employing an interleaved conventional multiplication and a folded technique. The proposed algorithm allows efficient realization of the bit-parallel systolic multipliers. The results show that the proposed time-independent multiplier saves about 54% space complexity as compared to other related multipliers for polynomial and dual bases of GF(2m). The proposed architectures include the features of regularity, modularity and local interconnection. Accordingly, it is well suited for VLSI implementation.