VLSI Architectures for Computing Multiplications and Inverses in GF(2m)
IEEE Transactions on Computers
An algorithm for solving discrete-time Wiener-Hopf equations based upon Euclid's algorithm
IEEE Transactions on Information Theory
A course in number theory and cryptography
A course in number theory and cryptography
A fast algorithm for computing multiplicative inverses in GF(2m) using normal bases
Information and Computation
Structure of parallel multipliers for a class of fields GF(2m)
Information and Computation
Efficient circuits for multiplying in GF(2m) for certain values of m
Discrete Mathematics - A collection of contributions in honour of Jack van Lint
IEEE Transactions on Computers - Special issue on computer arithmetic
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
On Computing Multiplicative Inverses in GF(2/sup m/)
IEEE Transactions on Computers
A Modified Massey-Omura Parallel Multiplier for a Class of Finite Fields
IEEE Transactions on Computers
IEEE Transactions on Computers
Selected Papers from the 4th Canadian Workshop on Information Theory and Applications II
Error Control Coding, Second Edition
Error Control Coding, Second Edition
IEEE Transactions on Computers
On the Inherent Space Complexity of Fast Parallel Multipliers for GF(2/supm/)
IEEE Transactions on Computers
A New Construction of Massey-Omura Parallel Multiplier over GF(2^{m})
IEEE Transactions on Computers
Finite Field Multiplier Using Redundant Representation
IEEE Transactions on Computers
IEEE Transactions on Computers
Efficient Bit Serial Multiplication Using Optimal Normal Bases of Type II in GF (2m)
ISC '02 Proceedings of the 5th International Conference on Information Security
Highly Regular Architectures for Finite Field Computation Using Redundant Basis
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
A New Low Complexity Parallel Multiplier for a Class of Finite Fields
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
Low Complexity Multiplication in a Finite Field Using Ring Representation
IEEE Transactions on Computers
Hardware architectures for public key cryptography
Integration, the VLSI Journal
A Redundant Representation of GF(q^n) for Designing Arithmetic Circuits
IEEE Transactions on Computers
IEEE Transactions on Computers
Software Multiplication Using Gaussian Normal Bases
IEEE Transactions on Computers
A New Approach to Subquadratic Space Complexity Parallel Multipliers for Extended Binary Fields
IEEE Transactions on Computers
Comb Architectures for Finite Field Multiplication in F(2^m)
IEEE Transactions on Computers
A high-speed word level finite field multiplier in F2m using redundant representation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Provably secure masking of AES
SAC'04 Proceedings of the 11th international conference on Selected Areas in Cryptography
A non-redundant and efficient architecture for karatsuba-ofman algorithm
ISC'05 Proceedings of the 8th international conference on Information Security
An Efficient Finite Field Multiplier Using Redundant Representation
ACM Transactions on Embedded Computing Systems (TECS)
Hi-index | 15.01 |
Let F2 denote the binary field and ${\schmi{\bf F}}_{2^m}$ an algebraic extension of degree m 1 over F2. Traditionally, elements of ${\schmi{\bf F}}_{2^m}$ are either represented as powers of a primitive element of ${\schmi{\bf F}}_{2^m}$ together with 0, or by an expansion in a basis of the vector space ${\schmi{\bf F}}_{2^m}$ over F2. We propose a new representation based on an isomorphism from ${\schmi{\bf F}}_{2^m}$ into the residue polynomial ring modulo Xn + 1. The new representation simultaneously satisfies the properties of various traditional representations, which leads, in some cases, to architectures of parallel-in-parallel-out arithmetic circuits (adder, multiplier, exponentiator/inverter, squarer, divider) with average to small complexity. We show that the implementation of all the arithmetic circuits designed for the new representation on an integrated circuit sometimes has smaller complexity than the implementation of all the arithmetic circuits designed for other representations. In addition, we derive a serial multiplier for the field ${\schmi{\bf F}}_{2^m}$ which comprises the least number of gates of all the serial multipliers known to the author, when m + 1 is a prime such that 2 is primitive in the field Zm+1.