Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
Implementing elliptic curve cryptography
Implementing elliptic curve cryptography
Low-Energy Digit-Serial/Parallel Finite Field Multipliers
Journal of VLSI Signal Processing Systems - Special issue on application specific systems, architectures and processors
Mastrovito Multiplier for All Trinomials
IEEE Transactions on Computers
Elliptic curves in cryptography
Elliptic curves in cryptography
Handbook of Applied Cryptography
Handbook of Applied Cryptography
Montgomery Multiplier and Squarer for a Class of Finite Fields
IEEE Transactions on Computers
A Super-Serial Galois Fields Multiplier for FPGAs and its Application to Public-Key Algorithms
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Elliptic Curves: Number Theory and Cryptography
Elliptic Curves: Number Theory and Cryptography
Guide to Elliptic Curve Cryptography
Guide to Elliptic Curve Cryptography
Parallel Multipliers Based on Special Irreducible Pentanomials
IEEE Transactions on Computers
Low-Complexity Bit-Parallel Systolic Montgomery Multipliers for Special Classes of GF(2^m)
IEEE Transactions on Computers
Systolic Multipliers for Finite Fields GF(2m)
IEEE Transactions on Computers
Efficient semisystolic architectures for finite-field arithmetic
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Improved throughput bit-serial multiplier for GF(2m) fields
Integration, the VLSI Journal
Efficient utilization of elliptic curve cryptosystem for hierarchical access control
Journal of Systems and Software
Low-power and high-speed design of a versatile bit-serial multiplier in finite fields GF(2m)
Integration, the VLSI Journal
Utilization of Pipeline Technique in AOP Based Multipliers with Parallel Inputs
Journal of Signal Processing Systems
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Many sequential multipliers for polynomial basis GF(2^k) fields have been proposed using the LSbit and MSbit multiplication algorithm. However, all those designs are defined over fixed size GF(2^k) fields and sometimes over fixed special form irreducible polynomials (AOL, trinomials, pentanomials). When such architectures are redesigned for arbitrary GF(2^k) fields and generic irreducible polynomials, therefore made versatile, they result in high space complexity (gate-latch number), low frequency (high critical path) and high latency designs. In this paper a Montgomery multiplication element (MME) architecture specially designed for arbitrary GF(2^k) fields defined over general irreducible polynomials, is proposed, based on an optimized version of the Montgomery multiplication (MM) algorithm for GF(2^k) fields. To evaluate the proposed MME and prove the efficiency of the MM algorithm in versatile designing, three distinct versatile Montgomery multiplier architectures are presented using this proposed MME. They achieve small gate-latch number and high clock frequency compared to other sequential versatile designs.