Use of elliptic curves in cryptography
Lecture notes in computer sciences; 218 on Advances in cryptology---CRYPTO 85
Journal of Cryptology
Handbook of Applied Cryptography
Handbook of Applied Cryptography
Elliptic Curve Public Key Cryptosystems
Elliptic Curve Public Key Cryptosystems
FPL '95 Proceedings of the 5th International Workshop on Field-Programmable Logic and Applications
Efficient Finite Field Serial/Parallel Multiplication
ASAP '96 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
Comparison of arithmetic architectures for Reed-Solomon decoders in reconfigurable hardware
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
Fast arithmetic architectures for public-key algorithms over Galois fields GF((2n)m)
EUROCRYPT'97 Proceedings of the 16th annual international conference on Theory and application of cryptographic techniques
Reconfigurable Implementation of Elliptic Curve Crypto Algorithms
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Implementation of Elliptic Curve Cryptographic Coprocessor over GF(2m) on an FPGA
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
FPGA Implementation of a Microcoded Elliptic Curve Cryptographic Processor
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Hardware architectures for public key cryptography
Integration, the VLSI Journal
A digit-serial multiplier for finite field GF(2m)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Versatile multiplier architectures in GF(2k) fields using the Montgomery multiplication algorithm
Integration, the VLSI Journal
On parallelization of high-speed processors for elliptic curve cryptography
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This contribution introduces a scalable multiplier architecture for Galois fields GF(2^k) amenable for field programmable gate arrays (FPGAs) implementations. This architecture is well suited for the implementation of public-key cryptosystems which require programmable multipliers in large Galois fields. The architecture trades a reduction in resources with an increase in the number of clock cycles. This architecture is also fine grain scalable in both the time and the area (or logic) dimensions thus facilitating implementations that maximize their use of finite FPGA resources while achieving fast computational speed. This leads to an architecture that requires less resources than traditional bit serial multipliers, which we demonstrated with implementations of multipliers in the field GF(2^167). Our results demonstrate that for this field one can realize super-serial multipliers that use 2.76 times fewer function generators and 6.84 times fewer flip-flops than their serial multiplier counterparts. We also extrapolated the performance of these multipliers in an elliptic curve cryptosystem.