Implementation of Elliptic Curve Cryptographic Coprocessor over GF(2m) on an FPGA

Authors:
Souichi Okada;Naoya Torii;Kouichi Itoh;Masahiko Takenaka
Affiliations:
-;-;-;-
Venue:
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
Year:
2000

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Abstract

We describe the implementation of an elliptic curve cryptographic (ECC) coprocessor over GF(2m) on an FPGA and also the result of simulations evaluating its LSI implementation. This coprocessor is suitable for server systems that require efficient ECC operations for various parameters. For speeding-up an elliptic scalar multiplication, we developed a novel configuration of a multiplier over GF(2m), which enables the multiplication of any bit length by using our data conversion method. The FPGA implementation of the coprocessor with our multiplier, operating at 3 MHz, takes 80 ms for 163-bit elliptic scalar multiplication on a pesudo-random curve and takes 45 ms on a Koblitz curve. The 0.25 µm ASIC implementation of the coprocessor, operating at 66 MHz and having a hardware size of 165 Kgates, would take 1.1 ms for 163-bit elliptic scalar multiplication on a pesudo-random curve and would take 0.65 ms on a Koblitz curve.