Handbook of Applied Cryptography
Handbook of Applied Cryptography
Introduction to Cryptography: With Coding Theory
Introduction to Cryptography: With Coding Theory
A High Performance Reconfigurable Elliptic Curve Processor for GF(2m)
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
A Scalable and Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m)
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
A Scalable GF(p) Elliptic Curve Processor Architecture for Programmable Hardware
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
Dual-Field Arithmetic Unit for GF(p) and GF(2m)
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Implementation of Elliptic Curve Cryptographic Coprocessor over GF(2m) on an FPGA
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
Power-time flexible architecture for GF(2k) elliptic curve cryptosystem computation
Proceedings of the 13th ACM Great Lakes symposium on VLSI
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Arithmetic operations involved in ECC computation suffer from modular inversion operation. Modular inversion is known to be the most time consuming operation performed by the ECC crypto-processor. Inversion operations can be replaced by several simpler multiplication operations using projective coordinates system instead of the classical affine coordinates system. Based on this notion, new elliptic curve cryptographic processor architecture is presented here which results in significant reduction in execution time and gives a range of trade-off between speed and area. This is achieved by exploiting the inherent parallelism that exists in elliptic curve arithmetic computations. In this work, the binary Edwards's projective coordinates system over GF 2n is presented to perform ECC arithmetic computations using parallel multipliers to obtain maximum parallelism. The projection X/Z, Y/Z when applied to the binary Edwards curves using the best number of parallel multipliers and adders reduces the computation time by 20% less than the use of affine coordinates with full utilisation of multiplier units. Our proposed processor enhances the addition operation time by 1.75 factor compared to the standard curves and four times scale up compared to the serial design of our processor.