Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
A VLSI Architecture for Fast Inversion in GF(2/sup m/)
IEEE Transactions on Computers
Discrete Applied Mathematics
Low-Complexity Bit-Parallel Canonical and Normal Basis Multipliers for a Class of Finite Fields
IEEE Transactions on Computers
On-Line Error Detection for Bit-Serial Multipliers in GF(2m)
Journal of Electronic Testing: Theory and Applications
Normal bases via general Gauss periods
Mathematics of Computation
A New Construction of Massey-Omura Parallel Multiplier over GF(2^{m})
IEEE Transactions on Computers
Side Channel Cryptanalysis of Product Ciphers
ESORICS '98 Proceedings of the 5th European Symposium on Research in Computer Security
Differential Fault Attacks on Elliptic Curve Cryptosystems
CRYPTO '00 Proceedings of the 20th Annual International Cryptology Conference on Advances in Cryptology
ARITH '03 Proceedings of the 16th IEEE Symposium on Computer Arithmetic (ARITH-16'03)
Guide to Elliptic Curve Cryptography
Guide to Elliptic Curve Cryptography
Low Complexity Word-Level Sequential Normal Basis Multipliers
IEEE Transactions on Computers
Concurrent Error Detection in a Bit-Parallel Systolic Multiplier for Dual Basis of GF(2m)
Journal of Electronic Testing: Theory and Applications
Concurrent Error Detection in a Polynomial Basis Multiplier over GF(2m)
Journal of Electronic Testing: Theory and Applications
Fault Detection Architectures for Field Multiplication Using Polynomial Bases
IEEE Transactions on Computers
Concurrent Error Detection in Multiply and Divide Arrays
IEEE Transactions on Computers
Concurrent Error Detection in ALU's by Recomputing with Shifted Operands
IEEE Transactions on Computers
Concurrent Error Detection in Digit-Serial Normal Basis Multiplication over GF(2m)
AINAW '08 Proceedings of the 22nd International Conference on Advanced Information Networking and Applications - Workshops
Concurrent Error Detection and Correction in Gaussian Normal Basis Multiplier over GF(2^m)
IEEE Transactions on Computers
IEEE Transactions on Computers
Concurrent error detection architectures for Gaussian normal basis multiplication over GF(2m)
Integration, the VLSI Journal
On the importance of checking cryptographic protocols for faults
EUROCRYPT'97 Proceedings of the 16th annual international conference on Theory and application of cryptographic techniques
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Sign change fault attacks on elliptic curve cryptosystems
FDTC'06 Proceedings of the Third international conference on Fault Diagnosis and Tolerance in Cryptography
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In this investigation, we present a semisystolic type-t(t is even) Gaussian normal basis(GNB) multiplier. Compared with the only existing bit parallel semisystolic even type GNB multiplier, our multiplier saves 10% space complexity and has 50% increase on throughput under the same time complexity. Based on the proposed multiplier, two multipliers with concurrent error detection(CED) capability are developed using two different schemes. The second multiplier with CED capability outperforms previous related works and can be further simply modified to correct certain multiple errors for GNB with type t≥6. Moreover, both the multipliers with CED capability have a high fault coverage. Our results show that any single-cell fault can be detected.