Efficient architecture for exponentiation and division in GF(2m) using irreducible AOP

Authors:
Won-Ho Lee;Young-Jun Heo;Kee-Young Yoo
Affiliations:
Department of Computer Engineering, Kyungpook National University, Daegu, South Korea;Network Security Department, ETRI, Daejeon, Korea;Department of Computer Engineering, Kyungpook National University, Daegu, South Korea
Venue:
ICCSA'03 Proceedings of the 2003 international conference on Computational science and its applications: PartI
Year:
2003

Citing 5
Cited 0

Structure of parallel multipliers for a class of fields GF(2m)

Information and Computation
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms

The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
New Systolic Arrays for C + AB2, Inversion, and Division in GF(2m)

IEEE Transactions on Computers
A Modified Massey-Omura Parallel Multiplier for a Class of Finite Fields

IEEE Transactions on Computers
A Systolic Power-Sum Circuit for GF(2/sup m/)

IEEE Transactions on Computers

Quantified Score

Hi-index	0.00

Visualization

Abstract

The important arithmetic operations over finite fields include exponentiation, division, and inversion. An exponentiation operation can be implemented using a series of squaring and multiplication operations over GF(2m) using a binary method, while division and inversion can be performed by the iterative application of an AB2 operation. Hence, it is important to develop a fast algorithm and efficient hardware for squaring, multiplication, and AB2 operations. The current paper presents new architectures for the simultaneous computation of multiplication and squaring operations, and the computation of an AB2 operation over GF(2m) generated by an irreducible AOP of degree m. The proposed architectures offer a significant improvement in reducing the hardware complexity compared with previous architectures, and can also be used as a kernel circuit for exponentiation, division, and inversion architectures. Furthermore, since the proposed architectures include regularity, modularity and concurrency, they can be easily designed on VLSI hardware and used in IC cards.