Efficient Reconfigurable Implementation of Canonical and Normal Basis Multipliers Over Galois Fields GF(2m) Generated by AOPs

Authors:
J. L. Imaña;J. M. Sánchez
Affiliations:
Departamento de Arquitectura de Computadores y Automática, Facultad Ciencias Físicas, Universidad Complutense de Madrid, Madrid, Spain 28040;Departamento de Informática. Escuela Politécnica, Universidad de Extremadura, Avda. Universidad, Cáceres, Spain s/n 10071
Venue:
Journal of VLSI Signal Processing Systems
Year:
2006

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Abstract

Galois fields GF(2m) are used in modern communication systems such as computer networks, satellite links, or compact disks, and they play an important role in a wide number of technical applications. They use arithmetic operations in the Galois field, where the multiplication is the most important and one of the most complex operations. Efficient multiplier architectures are therefore specially important. In this paper, a new method for multiplication in the canonical and normal basis over GF(2m) generated by an AOP (all-one-polynomial), which we have named the transpositional method, is presented. This new approach is based on the grouping and sharing of subexpressions. The theoretical space and time complexities of the bit-parallel canonical and normal basis multipliers constructed using our approach are equal to the smallest ones found in the literature for similar methods, but the practical implementation over reconfigurable hardware using our method reduces the area requirements of the multipliers.