STOC '92 Proceedings of the twenty-fourth annual ACM symposium on Theory of computing
STOC '92 Proceedings of the twenty-fourth annual ACM symposium on Theory of computing
Deterministic computations on a PRAM with static processor and memory faults
Fundamenta Informaticae
Deterministic Computations on a PRAM with Static Processor and Memory Faults
Fundamenta Informaticae
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A scheme for emulating the parallel random access machine (PRAM) on a faulty hypercube is presented. All components of the hypercube, including the memory modules, are assumed to be subject to failure. The faults may occur at any time during the emulation and the system readjusts dynamically. The scheme, which rests on L.G. Valiant's BSP model (1990), is the first to achieve optimal and work-preserving PRAM emulation on a dynamically faulty network.