A New Version of the Stream Cipher SNOW
SAC '02 Revised Papers from the 9th Annual International Workshop on Selected Areas in Cryptography
Cryptanalytic Time/Memory/Data Tradeoffs for Stream Ciphers
ASIACRYPT '00 Proceedings of the 6th International Conference on the Theory and Application of Cryptology and Information Security: Advances in Cryptology
Cryptanalysis of the "Grain" family of stream ciphers
ASIACCS '06 Proceedings of the 2006 ACM Symposium on Information, computer and communications security
Cryptanalysis of alleged A5 stream cipher
EUROCRYPT'97 Proceedings of the 16th annual international conference on Theory and application of cryptographic techniques
New applications of time memory data tradeoffs
ASIACRYPT'05 Proceedings of the 11th international conference on Theory and Application of Cryptology and Information Security
FSE'06 Proceedings of the 13th international conference on Fast Software Encryption
Lightweight privacy preserving authentication for RFID using a stream cipher
FSE'10 Proceedings of the 17th international conference on Fast software encryption
Lightweight cryptography and RFID: tackling the hidden overheads
ICISC'09 Proceedings of the 12th international conference on Information security and cryptology
An algorithm for constructing a fastest Galois NLFSR generating a given sequence
SETA'10 Proceedings of the 6th international conference on Sequences and their applications
A new framework for RFID privacy
ESORICS'10 Proceedings of the 15th European conference on Research in computer security
A 3-subset meet-in-the-middle attack: cryptanalysis of the lightweight block cipher KTANTAN
SAC'10 Proceedings of the 17th international conference on Selected areas in cryptography
Extended cubes: enhancing the cube attack by extracting low-degree non-linear equations
Proceedings of the 6th ACM Symposium on Information, Computer and Communications Security
A countermeasure against power analysis attacks for FSR-based stream ciphers
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
SPONGENT: a lightweight hash function
CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
Piccolo: an ultra-lightweight blockcipher
CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
MASHA: low cost authentication with a new stream cipher
ISC'11 Proceedings of the 14th international conference on Information security
An architectural countermeasure against power analysis attacks for FSR-Based stream ciphers
COSADE'12 Proceedings of the Third international conference on Constructive Side-Channel Analysis and Secure Design
Low-latency encryption: is "Lightweight = light + wait"?
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
Proceedings of the 7th ACM Symposium on Information, Computer and Communications Security
Differential attacks against stream cipher ZUC
ASIACRYPT'12 Proceedings of the 18th international conference on The Theory and Application of Cryptology and Information Security
On the decomposition of an NFSR into the cascade connection of an NFSR into an LFSR
Journal of Complexity
Multipurpose cryptographic primitive ARMADILLO3
CARDIS'12 Proceedings of the 11th international conference on Smart Card Research and Advanced Applications
An improved hardware implementation of the grain-128a stream cipher
ICISC'12 Proceedings of the 15th international conference on Information Security and Cryptology
ICISC'12 Proceedings of the 15th international conference on Information Security and Cryptology
On the largest affine sub-families of a family of NFSR sequences
Designs, Codes and Cryptography
A zero-knowledge based framework for RFID privacy
Journal of Computer Security - ESORICS 2010
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A new family of stream ciphers, Grain, is proposed. Two variants, a 80-bit and a 128-bit variant are specified, denoted Grain and Grain-128 respectively. The designs target hardware environments where gate count, power consumption and memory are very limited. Both variants are based on two shift registers and a nonlinear output function. The ciphers also have the additional feature that the speed can be easily increased at the expense of extra hardware.