Shift Register Sequences
New Stream Cipher Designs: The eSTREAM Finalists
New Stream Cipher Designs: The eSTREAM Finalists
The Grain Family of Stream Ciphers
New Stream Cipher Designs
New Stream Cipher Designs
New Stream Cipher Designs
New Stream Cipher Designs
A transformation from the Fibonacci to the Galois NLFSRs
IEEE Transactions on Information Theory
An algorithm for constructing a fastest Galois NLFSR generating a given sequence
SETA'10 Proceedings of the 6th international conference on Sequences and their applications
An Improved Hardware Implementation of the Grain Stream Cipher
DSD '10 Proceedings of the 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools
Grain-128a: a new version of Grain-128 with optional authentication
International Journal of Wireless and Mobile Computing
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We study efficient high-throughput hardware implementations of the Grain-128a family of stream ciphers. To increase the throughput compared to the standard design, we apply five different techniques in combination: isolation of the authentication section, Fibonacci-to-Galois transformation of the feedback shift registers, multi-frequency implementation, simplification of the pre-outputs functions and internal pipelining. The combined effect of all these techniques enables an average 56% higher keystream generation throughput among all the ciphers, at the expense of an average 8% area penalty, an average 4% power overhead and a 21% slower keystream initialization phase. An alternative combination of techniques allows an average 23% throughput improvement in all phases.