Amortized efficiency of list update and paging rules
Communications of the ACM
Wide area traffic: the failure of Poisson modeling
IEEE/ACM Transactions on Networking (TON)
Explicit allocation of best-effort packet delivery service
IEEE/ACM Transactions on Networking (TON)
Online computation and competitive analysis
Online computation and competitive analysis
The iSLIP scheduling algorithm for input-queued switches
IEEE/ACM Transactions on Networking (TON)
Competitve buffer management for shared-memory switches
Proceedings of the thirteenth annual ACM symposium on Parallel algorithms and architectures
Routers with a single stage of buffering
Proceedings of the 2002 conference on Applications, technologies, architectures, and protocols for computer communications
Buffer Overflow Management in QoS Switches
SIAM Journal on Computing
Harmonic buffer management policy for shared memory switches
Theoretical Computer Science - Special issue: Online algorithms in memoriam, Steve Seiden
On the Performance of Greedy Algorithms in Packet Buffering
SIAM Journal on Computing
Scheduling policies for CIOQ switches
Journal of Algorithms
An improved algorithm for CIOQ switches
ACM Transactions on Algorithms (TALG)
Maximizing throughput in multi-queue switches
Algorithmica
An experimental study of new and known online packet buffering algorithms
ESA'07 Proceedings of the 15th annual European conference on Algorithms
Matching output queueing with a combined input/output-queued switch
IEEE Journal on Selected Areas in Communications
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The buffered crossbar switch architecture has recently gained considerable research attention. In such a switch, besides normal input and output queues, a small buffer is associated with each crosspoint. Due to the introduction of crossbar buffers, output and input contention is eliminated, and the scheduling process is greatly simplified. We analyze the performance of switch policies by means of competitive analysis, where a uniform guarantee is provided for all traffic patterns. The goal of the switch policy is to maximize the weighted throughput of the switch, that is the total value of packets sent out of the switch. For the case of unit value packets (Best Effort), we present a simple greedy switch policy that is 4-competitive. For the case of variable value packets, we consider the Priority Queueing (PQ) mechanism, which provides better Quality of Service (QoS) guarantees by decreasing the delay of real-time traffic. We propose a preemptive greedy switch policy that achieves a competitve ratio of 18. Our results hold for any value of the switch fabric speedup. Moreover, the presented policies incur low overhead and are amenable to efficient hardware implementation at wire speed. To the best of our knowledge, this is the first work on competitive analysis for the buffered crossbar switch architecture.