FPGA Implementation of Parallel Alpha-Beta Associative Memories

Authors:
Mario Aldape-Pérez;Cornelio Yáñez-Márquez;Amadeo José Argüelles-Cruz
Affiliations:
Center for Computing Research, CIC, National Polytechnic Institute, IPN, Mexico City, Mexico;Center for Computing Research, CIC, National Polytechnic Institute, IPN, Mexico City, Mexico;Center for Computing Research, CIC, National Polytechnic Institute, IPN, Mexico City, Mexico
Venue:
ICIAR '08 Proceedings of the 5th international conference on Image Analysis and Recognition
Year:
2008

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Abstract

Associative memories have a number of properties, including a rapid, compute efficient best-match and intrinsic noise tolerance that make them ideal for many applications. However, a significant bottleneck to the use of associative memories in real-time systems is the amount of data that requires processing. Notwithstanding, Alpha-Beta Associative Memories have been widely used for color matching in industrial processes [1], text translation [2] and image retrieval applications [3]. The aim of this paper is to present the work that produced a dedicated hardware design, implemented on a field programmable gate array (FPGA) that applies the Alpha-Beta Associative Memories model for fingerprint verification tasks. Along the experimental phase, performance of the proposed associative memory architecture is measured by learning large sequences of symbols and recalling them successfully. As a result, a simple but efficient embedded processing architecture that overcomes various challenges involved in pattern recognition tasks is implemented on a Xilinx Spartan3 FPGA.