Producing Short Counterexamples Using "Crucial Events"

  • Authors:
  • Sujatha Kashyap;Vijay K. Garg

  • Affiliations:
  • ECE Department, University of Texas at Austin, Austin, USA TX 78712;IBM India Research Lab., New Delhi, India

  • Venue:
  • CAV '08 Proceedings of the 20th international conference on Computer Aided Verification
  • Year:
  • 2008

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Abstract

Ideally, a model checking tool should successfully tackle state space explosion for complete system validation, while providing short counterexamples when an error exists. Techniques such as partial order (p.o.) reduction [1,2] are very effective at tackling state space explosion, but do not produce short counterexamples. On the other hand, directed model checking [3,4] techniques find short counterexamples, but are prone to state space explosion in the absence of errors. To the best of our knowledge, there is currently no single technique that meets both requirements. We present such a technique in this paper.For a subset of CTL, which we call CETL (Crucial Event Temporal Logic), we show that there exists a unique minimumset of events in each program trace whose execution is both necessary and sufficientto lead to an error state. These events are called "crucial events". We show how crucial events can be used to produce short counterexamples, while also providing state space reduction.We have implemented the techniques presented here as an extension to the model checker SPIN, called SPICED (Simple PROMELA Interpreter with Crucial Event Detection). Experimental results are presented.