Tracing the Origins of Verification Conditions
AMAST '96 Proceedings of the 5th International Conference on Algebraic Methodology and Software Technology
AutoBayes: a system for generating data analysis programs from statistical models
Journal of Functional Programming
Automating the implementation of Kalman filter algorithms
ACM Transactions on Mathematical Software (TOMS)
Generating error traces from verification-condition counterexamples
Science of Computer Programming - Formal methods for components and objects pragmatic aspects and applications
Proceedings of the 5th international conference on Generative programming and component engineering
JACK: a tool for validation of security and behaviour of Java applications
FMCO'06 Proceedings of the 5th international conference on Formal methods for components and objects
Certifiable program generation
GPCE'05 Proceedings of the 4th international conference on Generative Programming and Component Engineering
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Hoare-style program verification relies on the construction and discharge of verification conditions (VCs) but offers no support to trace, analyze, and understand the VCs themselves. We describe a systematic extension of the Hoare rules by labels so that the calculus itself can be used to build up explanationsof the VCs. The labels are maintained through the different processing steps and rendered as natural language explanations. The generated explanations are based only on an analysis of the labels rather than directly on the logical meaning of the underlying VCs or their proofs. The explanations can be customized to capture different aspects of the VCs; here, we focus on labelings that explain their structure and purpose.