Integrated Power-Gating and State Assignment for Low Power FSM Synthesis

  • Authors:
  • Sambhu Nath Pradhan;M. Tilak Kumar;Santanu Chattopadhyay

  • Affiliations:
  • -;-;-

  • Venue:
  • ISVLSI '08 Proceedings of the 2008 IEEE Computer Society Annual Symposium on VLSI
  • Year:
  • 2008

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Abstract

Power-gating is an effective technique for reducing standby leakage power and dynamic power. In power-gating one can shut off the power supply to sections of logic block while keeping other logic blocks active. However, careful design is required to make power-gating technique effective, otherwise, negative effect of power-gating may overwhelm the potential gain. In this paper we have presented the state partitioning and state encoding strategy targeting low power Finite State Machine (FSM) decomposition based on Genetic Algorithmic approach. All the previous works dealt only FSM partitioning but did not consider state encoding together. This is the first ever approach considering FSM partitioning and state encoding together in power-gating technique. Experimental result shows that upto 73% power saving can be done giving small amount of area penalty.