BURG: fast optimal instruction selection and tree parsing
ACM SIGPLAN Notices
Instruction selection using binate covering for code size optimization
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
System architecture directions for networked sensors
ACM SIGPLAN Notices
Soft-cores generation by instruction set analysis
Proceedings of the 14th international symposium on Systems synthesis
Wireless sensor networks: a survey
Computer Networks: The International Journal of Computer and Telecommunications Networking
Distributed sleep transistor network for power reduction
Proceedings of the 40th annual Design Automation Conference
SPARK: A High-Lev l Synthesis Framework For Applying Parallelizing Compiler Transformations
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Energy Scavenging for Wireless Sensor Networks: With Special Focus on Vibrations
Energy Scavenging for Wireless Sensor Networks: With Special Focus on Vibrations
Microarchitectural techniques for power gating of execution units
Proceedings of the 2004 international symposium on Low power electronics and design
Post-layout leakage power minimization based on distributed sleep transistor insertion
Proceedings of the 2004 international symposium on Low power electronics and design
An ultra low-power processor for sensor networks
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Versatile low power media access for wireless sensor networks
SenSys '04 Proceedings of the 2nd international conference on Embedded networked sensor systems
Contiki - A Lightweight and Flexible Operating System for Tiny Networked Sensors
LCN '04 Proceedings of the 29th Annual IEEE International Conference on Local Computer Networks
Generating Efficient Custom FPGA Soft-Cores for Control-Dominated Applications
ASAP '05 Proceedings of the 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors
Design of a wireless sensor network platform for detecting rare, random, and ephemeral events
IPSN '05 Proceedings of the 4th international symposium on Information processing in sensor networks
MANTIS OS: an embedded multithreaded operating system for wireless micro sensor platforms
Mobile Networks and Applications
Synthesis of an application-specific soft multiprocessor system
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
Exploring the Processor and ISA Design for Wireless Sensor Network Applications
VLSID '08 Proceedings of the 21st International Conference on VLSI Design
Automatic architecture refinement techniques for customizing processing elements
Proceedings of the 45th annual Design Automation Conference
Integrated Power-Gating and State Assignment for Low Power FSM Synthesis
ISVLSI '08 Proceedings of the 2008 IEEE Computer Society Annual Symposium on VLSI
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system
ASAP '09 Proceedings of the 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors
An accelerator-based wireless sensor network processor in 130nm CMOS
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
Low-power TinyOS tuned processor platform for wireless sensor network motes
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Quanto: tracking energy in networked embedded systems
OSDI'08 Proceedings of the 8th USENIX conference on Operating systems design and implementation
Knowledge-based design space exploration of wireless sensor networks
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
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Wireless sensor networks (WSN) is a new and very challenging research field for embedded system design automation. Engineering a WSN node hardware platform is known to be a tough challenge, as the design must enforce many severe constraints, among which energy dissipation is by far the most important one. WSN node devices have until now been designed using off-the-shelf low-power microcontroller units (MCUs), even if their power dissipation is still an issue and hinders the widespread use of this new technology. In this work, we propose a complete system-level flow for an alternative approach based on the concept of hardware microtasks, which relies on hardware specialization and power gating to drastically improve the energy efficiency of the computational/control part of the node. Our case study shows that power savings between one to two orders of magnitude are possible w.r.t. MCU-based implementations.